Archive/lede/target/linux/mediatek/patches-6.12/842-mediatek-enable-using-efuse-cali-data-for-mt7988-cpu-volt.patch

From c776eb44070d009375559d8c6eb8790edfe129a9 Mon Sep 17 00:00:00 2001
From: Sam Shih <sam.shih@mediatek.com>
Date: Tue, 4 Mar 2025 19:35:14 +0800
Subject: [PATCH 2/2] cpufreq: mt7988: enable using efuse calibration data for
 adjusting cpu volt

---
 arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
@@ -55,6 +55,8 @@
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			nvmem-cells = <&cpufreq_calibration>;
+			nvmem-cell-names = "calibration-data";
 			mediatek,cci = <&cci>;
 		};
 
@@ -67,6 +69,8 @@
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			nvmem-cells = <&cpufreq_calibration>;
+			nvmem-cell-names = "calibration-data";
 			mediatek,cci = <&cci>;
 		};
 
@@ -79,6 +83,8 @@
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			nvmem-cells = <&cpufreq_calibration>;
+			nvmem-cell-names = "calibration-data";
 			mediatek,cci = <&cci>;
 		};
 
@@ -91,6 +97,8 @@
 				 <&topckgen CLK_TOP_XTAL>;
 			clock-names = "cpu", "intermediate";
 			operating-points-v2 = <&cluster0_opp>;
+			nvmem-cells = <&cpufreq_calibration>;
+			nvmem-cell-names = "calibration-data";
 			mediatek,cci = <&cci>;
 		};