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* style(simd): rename sse to avx * fix(exp,simd): apply the right avx512 constraints to a few methods * fix(exp,simd): apply the right avx512 constraints to a few methods
3.7 KiB
3.7 KiB
name, slug, sourceRef, category, subCategory, similarHelpers, position, signatures
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| Contains | contains | exp/simd/intersect_avx512.go#L9 | exp | simd |
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Checks if a target value is present in a collection using SIMD instructions. The suffix (x4, x8, x16, x32, x64) indicates the number of lanes processed simultaneously.
Requirements
- Go 1.26+ with
GOEXPERIMENT=simd - amd64 architecture only
CPU compatibility
| SIMD variant | Lanes | Required flags | Typical CPUs |
|---|---|---|---|
| AVX (xN) | 2-16 | avx |
All amd64 |
| AVX2 (xN) | 4-32 | avx2 |
Intel Haswell+, AMD Excavator+ |
| AVX-512 (xN) | 8-64 | avx512f |
Intel Skylake-X+, some Xeons |
Note
: Choose the variant matching your CPU's capabilities. Higher lane counts provide better performance but require newer CPU support.
// Using AVX2 variant (32 lanes at once) - Intel Haswell+ / AMD Excavator+
found := simd.ContainsInt8x32([]int8{1, 2, 3, 4, 5}, 3)
// true
// Using AVX variant (16 lanes at once) - works on all amd64
found := simd.ContainsInt64x2([]int64{1000000, 2000000, 3000000}, 2000000)
// true
// Using AVX-512 variant (64 lanes at once) - Intel Skylake-X+
found := simd.ContainsUint8x64([]uint8{10, 20, 30, 40, 50}, 30)
// true
// Float32 with AVX2 (8 lanes at once)
found := simd.ContainsFloat32x8([]float32{1.1, 2.2, 3.3, 4.4}, 3.3)
// true
// Empty collection returns false
found := simd.ContainsInt16x16([]int16{}, 5)
// false