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Update On Sun Mar 24 19:31:25 CET 2024

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github-action[bot]
2024-03-24 19:31:25 +01:00
parent 36fa23f28f
commit e1cce7c901
2666 changed files with 50862 additions and 80992 deletions
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.github/update.log
+1
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@@ -596,3 +596,4 @@ Update On Wed Mar 20 15:20:33 CET 2024
Update On Fri Mar 22 14:55:10 CET 2024
Update On Fri Mar 22 19:26:11 CET 2024
Update On Sat Mar 23 19:27:23 CET 2024
Update On Sun Mar 24 19:31:12 CET 2024
brook/brooklink.go
+2
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@@ -18,6 +18,7 @@ import (
"crypto/tls"
"crypto/x509"
"errors"
"io"
"net"
"net/url"
"os/exec"
@@ -319,6 +320,7 @@ func (x *BrookLink) TCPHandle(s *socks5.Server, c *net.TCPConn, r *socks5.Reques
if err != nil {
return err
}
io.Copy(io.Discard, c)
return nil
}
return socks5.ErrUnsupportCmd
brook/cli/brook/main.go
+1 -1
View File
@@ -52,7 +52,7 @@ func main() {
df := func() {}
app := cli.NewApp()
app.Name = "Brook"
app.Version = "20240404"
app.Version = "20240606"
app.Usage = "A cross-platform programmable network tool"
app.Authors = []*cli.Author{
{
brook/docs/images/user-system.png
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brook/protocol/user-system.md
+81
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@@ -0,0 +1,81 @@
# User System
⚠️ Currently, this feature is experimental. At present, only this [brook_linux_amd64.20240606](https://github.com/txthinking/bash/releases/download/v20221005/brook_linux_amd64.20240606) and [tun2brook](https://github.com/txthinking/tun2brook) support it.
This content introduces how to develop a user system with Brook. Your system only needs to focus on two concepts: **Token** and **User API**. To support user system, you **must use brook server/wsserver/wssserver/quicserver with the brook protocol**.
<img src="https://brook.app/images/user-system.png" width="500">
## Token
The concept of a token is similar to the user authentication systems of many other systems, such as cookie, session, it represents an identifier that is visible to the user, so **it shoud be unpredictable**. For example, suppose your user system has the concept of an auto-incrementing user ID. You might need to encrypt this user ID to generate a token to be placed on the client side. Alternatively, if your user ID is a UUID, or if you have an auto-incrementing user ID along with an additional UUID, you can also use the UUID directly as a token. This entirely depends on your own decision. If you have developed any user authentication system, this is basic knowledge. No matter what method you use to generate the token, you need to **encode it as hexadecimal**. The length should be controlled at around a few dozen bytes, do not make it too long.
For example, encrypt user id or make session, and encode in hexadecimal:
```
hex_encode(your_encrypt_or_session_function(user id))
// 3ae6afc9fad94abd8985d8ecc77afb273ae6afc9fad94abd8985d8ecc77afb273ae6afc9fad94abd8985d8ecc77afb27 // 48 bytes token
```
For example, UUID:
```javascript
crypto.randomUUID().replaceAll('-', '')
// 3ae6afc9fad94abd8985d8ecc77afb27 // 16 bytes token
```
## User API
Your system must provide an API for Brook Server to validate token. For example: `https://your-api-server.com/a_unpredictable_path`, yes, it is recommended to add an unpredictable path to your https API, of course, you can also use the http api for internal network communication. Brook Server will send GET request to your User API to check if token is valid, the request format is `https://your-api-server.com/a_unpredictable_path?token=xxx`. When the response is 200, the body should be the user's unique identifier, such as user ID; all other status codes are considered to represent an invalid user, and in these cases, the body should be a string describing the error.
For example, your User API is:
```
https://your-api-server.com/a_unpredictable_path
```
Brook Server will send GET request with token to your User API:
```
GET https://your-api-server.com/a_unpredictable_path?token=xxx
```
If the token is valid, your User API should response status code 200 and body should be user's unique identifier, such as user ID 9:
```
HTTP/1.1 200 OK
Content-Length: 1
Content-Type: text/plain; charset=utf-8
9
```
If the token is invalid, or because of any other reasons, the service cannot be provided to this user, such as the user has expired, your User API should response status code non-200 and body should be the short reason:
```
HTTP/1.1 400 BAD REQUEST
Content-Length: 22
Content-Type: text/plain; charset=utf-8
The user 9 has expired
```
## Run Brook Server with your User API
```
brook --serverLog /path/to/log.txt --userAPI https://your-api-server.com/a_unpredictable_path server --listen :9999 --password hello
```
You can count the traffic of each user from serverLog
```
{"bytes":"2190","dst":"8.8.8.8:53","from":"34.105.110.232:49514","network":"tcp","time":"2024-02-26T09:56:12Z","user":"9"}
{"bytes":"2237","dst":"8.8.8.8:53","from":"34.105.110.232:49331","network":"udp","time":"2024-02-26T09:57:12Z","user":"9"}
```
## Generate brook link with token
```
brook link --server 1.2.3.4:9999 --password hello --token xxx
```
clash-meta/component/iface/iface.go
+15 -8
View File
@@ -40,16 +40,23 @@ func ResolveInterface(name string) (*Interface, error) {
ipNets := make([]netip.Prefix, 0, len(addrs))
for _, addr := range addrs {
ipNet := addr.(*net.IPNet)
ip, _ := netip.AddrFromSlice(ipNet.IP)
ones, bits := ipNet.Mask.Size()
if bits == 32 {
var pf netip.Prefix
switch ipNet := addr.(type) {
case *net.IPNet:
ip, _ := netip.AddrFromSlice(ipNet.IP)
ones, bits := ipNet.Mask.Size()
if bits == 32 {
ip = ip.Unmap()
}
pf = netip.PrefixFrom(ip, ones)
case *net.IPAddr:
ip, _ := netip.AddrFromSlice(ipNet.IP)
ip = ip.Unmap()
pf = netip.PrefixFrom(ip, ip.BitLen())
}
if pf.IsValid() {
ipNets = append(ipNets, pf)
}
pf := netip.PrefixFrom(ip, ones)
ipNets = append(ipNets, pf)
}
r[iface.Name] = &Interface{
clash-meta/config/config.go
+2
View File
@@ -265,6 +265,7 @@ type RawTun struct {
EndpointIndependentNat bool `yaml:"endpoint-independent-nat" json:"endpoint_independent_nat,omitempty"`
UDPTimeout int64 `yaml:"udp-timeout" json:"udp_timeout,omitempty"`
FileDescriptor int `yaml:"file-descriptor" json:"file-descriptor"`
TableIndex int `yaml:"table-index" json:"table-index"`
}
type RawTuicServer struct {
@@ -1448,6 +1449,7 @@ func parseTun(rawTun RawTun, general *General) error {
EndpointIndependentNat: rawTun.EndpointIndependentNat,
UDPTimeout: rawTun.UDPTimeout,
FileDescriptor: rawTun.FileDescriptor,
TableIndex: rawTun.TableIndex,
}
return nil
clash-meta/hub/route/configs.go
+4
View File
@@ -91,6 +91,7 @@ type tunSchema struct {
EndpointIndependentNat *bool `yaml:"endpoint-independent-nat" json:"endpoint-independent-nat,omitempty"`
UDPTimeout *int64 `yaml:"udp-timeout" json:"udp-timeout,omitempty"`
FileDescriptor *int `yaml:"file-descriptor" json:"file-descriptor"`
TableIndex *int `yaml:"table-index" json:"table-index"`
}
type tuicServerSchema struct {
@@ -209,6 +210,9 @@ func pointerOrDefaultTun(p *tunSchema, def LC.Tun) LC.Tun {
if p.FileDescriptor != nil {
def.FileDescriptor = *p.FileDescriptor
}
if p.TableIndex != nil {
def.TableIndex = *p.TableIndex
}
}
return def
}
clash-meta/listener/config/tun.go
+1
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@@ -49,4 +49,5 @@ type Tun struct {
EndpointIndependentNat bool `yaml:"endpoint-independent-nat" json:"endpoint-independent-nat,omitempty"`
UDPTimeout int64 `yaml:"udp-timeout" json:"udp-timeout,omitempty"`
FileDescriptor int `yaml:"file-descriptor" json:"file-descriptor"`
TableIndex int `yaml:"table-index" json:"table-index"`
}
clash-meta/listener/inbound/tun.go
+2
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@@ -40,6 +40,7 @@ type TunOption struct {
EndpointIndependentNat bool `inbound:"endpoint_independent_nat,omitempty"`
UDPTimeout int64 `inbound:"udp_timeout,omitempty"`
FileDescriptor int `inbound:"file-descriptor,omitempty"`
TableIndex int `inbound:"table-index,omitempty"`
}
func (o TunOption) Equal(config C.InboundConfig) bool {
@@ -118,6 +119,7 @@ func NewTun(options *TunOption) (*Tun, error) {
EndpointIndependentNat: options.EndpointIndependentNat,
UDPTimeout: options.UDPTimeout,
FileDescriptor: options.FileDescriptor,
TableIndex: options.TableIndex,
},
}, nil
}
clash-meta/listener/listener.go
+2 -1
View File
@@ -823,7 +823,8 @@ func hasTunConfigChange(tunConf *LC.Tun) bool {
LastTunConf.StrictRoute != tunConf.StrictRoute ||
LastTunConf.EndpointIndependentNat != tunConf.EndpointIndependentNat ||
LastTunConf.UDPTimeout != tunConf.UDPTimeout ||
LastTunConf.FileDescriptor != tunConf.FileDescriptor {
LastTunConf.FileDescriptor != tunConf.FileDescriptor ||
LastTunConf.TableIndex != tunConf.TableIndex {
return true
}
clash-meta/listener/sing_tun/server.go
+5 -1
View File
@@ -112,6 +112,10 @@ func New(options LC.Tun, tunnel C.Tunnel, additions ...inbound.Addition) (l *Lis
} else {
udpTimeout = int64(sing.UDPTimeout.Seconds())
}
tableIndex := options.TableIndex
if tableIndex == 0 {
tableIndex = 2022
}
includeUID := uidToRange(options.IncludeUID)
if len(options.IncludeUIDRange) > 0 {
var err error
@@ -225,7 +229,7 @@ func New(options LC.Tun, tunnel C.Tunnel, additions ...inbound.Addition) (l *Lis
ExcludePackage: options.ExcludePackage,
FileDescriptor: options.FileDescriptor,
InterfaceMonitor: defaultInterfaceMonitor,
TableIndex: 2022,
TableIndex: tableIndex,
}
err = l.buildAndroidRules(&tunOptions)
clash-nyanpasu/backend/Cargo.lock
Generated
+2 -2
View File
@@ -322,9 +322,9 @@ checksum = "fbb36e985947064623dbd357f727af08ffd077f93d696782f3c56365fa2e2799"
[[package]]
name = "async-trait"
version = "0.1.78"
version = "0.1.79"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "461abc97219de0eaaf81fe3ef974a540158f3d079c2ab200f891f1a2ef201e85"
checksum = "a507401cad91ec6a857ed5513a2073c82a9b9048762b885bb98655b306964681"
dependencies = [
"proc-macro2",
"quote",
clash-nyanpasu/manifest/version.json
+2 -2
View File
@@ -2,7 +2,7 @@
"manifest_version": 1,
"latest": {
"mihomo": "v1.18.1",
"mihomo_alpha": "alpha-9c08e93",
"mihomo_alpha": "alpha-d56a439",
"clash_rs": "v0.1.15",
"clash_premium": "2023-09-05-gdcc8d87"
},
@@ -36,5 +36,5 @@
"darwin-x64": "clash-darwin-amd64-n{}.gz"
}
},
"updated_at": "2024-03-21T22:24:56.585Z"
"updated_at": "2024-03-23T22:23:53.725Z"
}
clash-nyanpasu/package.json
+2 -2
View File
@@ -141,7 +141,7 @@
"prettier-plugin-toml": "2.0.1",
"sass": "1.72.0",
"shikiji": "0.10.2",
"stylelint": "16.2.1",
"stylelint": "16.3.0",
"stylelint-config-html": "1.1.0",
"stylelint-config-recess-order": "5.0.0",
"stylelint-config-standard": "36.0.0",
@@ -151,7 +151,7 @@
"telegraf": "4.16.3",
"tsx": "4.7.1",
"typescript": "5.4.3",
"vite": "5.2.4",
"vite": "5.2.5",
"vite-plugin-monaco-editor": "1.1.0",
"vite-plugin-svgr": "4.2.0"
}
clash-nyanpasu/pnpm-lock.yaml
Generated
+85 -67
View File
@@ -141,7 +141,7 @@ devDependencies:
version: 7.3.1(eslint@8.57.0)(typescript@5.4.3)
'@vitejs/plugin-react':
specifier: 4.2.1
version: 4.2.1(vite@5.2.4)
version: 4.2.1(vite@5.2.5)
adm-zip:
specifier: 0.5.12
version: 0.5.12
@@ -239,26 +239,26 @@ devDependencies:
specifier: 0.10.2
version: 0.10.2
stylelint:
specifier: 16.2.1
version: 16.2.1(typescript@5.4.3)
specifier: 16.3.0
version: 16.3.0(typescript@5.4.3)
stylelint-config-html:
specifier: 1.1.0
version: 1.1.0(postcss-html@1.6.0)(stylelint@16.2.1)
version: 1.1.0(postcss-html@1.6.0)(stylelint@16.3.0)
stylelint-config-recess-order:
specifier: 5.0.0
version: 5.0.0(stylelint@16.2.1)
version: 5.0.0(stylelint@16.3.0)
stylelint-config-standard:
specifier: 36.0.0
version: 36.0.0(stylelint@16.2.1)
version: 36.0.0(stylelint@16.3.0)
stylelint-declaration-block-no-ignored-properties:
specifier: 2.8.0
version: 2.8.0(stylelint@16.2.1)
version: 2.8.0(stylelint@16.3.0)
stylelint-order:
specifier: 6.0.4
version: 6.0.4(stylelint@16.2.1)
version: 6.0.4(stylelint@16.3.0)
stylelint-scss:
specifier: 6.2.1
version: 6.2.1(stylelint@16.2.1)
version: 6.2.1(stylelint@16.3.0)
telegraf:
specifier: 4.16.3
version: 4.16.3
@@ -269,14 +269,14 @@ devDependencies:
specifier: 5.4.3
version: 5.4.3
vite:
specifier: 5.2.4
version: 5.2.4(@types/node@20.11.30)(sass@1.72.0)
specifier: 5.2.5
version: 5.2.5(@types/node@20.11.30)(sass@1.72.0)
vite-plugin-monaco-editor:
specifier: npm:vite-plugin-monaco-editor-new@1.1.3
version: /vite-plugin-monaco-editor-new@1.1.3(monaco-editor@0.47.0)
vite-plugin-svgr:
specifier: 4.2.0
version: 4.2.0(typescript@5.4.3)(vite@5.2.4)
version: 4.2.0(typescript@5.4.3)(vite@5.2.5)
packages:
@@ -703,38 +703,38 @@ packages:
chalk: 5.3.0
dev: true
/@csstools/css-parser-algorithms@2.5.0(@csstools/css-tokenizer@2.2.3):
resolution: {integrity: sha512-abypo6m9re3clXA00eu5syw+oaPHbJTPapu9C4pzNsJ4hdZDzushT50Zhu+iIYXgEe1CxnRMn7ngsbV+MLrlpQ==}
/@csstools/css-parser-algorithms@2.6.1(@csstools/css-tokenizer@2.2.4):
resolution: {integrity: sha512-ubEkAaTfVZa+WwGhs5jbo5Xfqpeaybr/RvWzvFxRs4jfq16wH8l8Ty/QEEpINxll4xhuGfdMbipRyz5QZh9+FA==}
engines: {node: ^14 || ^16 || >=18}
peerDependencies:
'@csstools/css-tokenizer': ^2.2.3
'@csstools/css-tokenizer': ^2.2.4
dependencies:
'@csstools/css-tokenizer': 2.2.3
'@csstools/css-tokenizer': 2.2.4
dev: true
/@csstools/css-tokenizer@2.2.3:
resolution: {integrity: sha512-pp//EvZ9dUmGuGtG1p+n17gTHEOqu9jO+FiCUjNN3BDmyhdA2Jq9QsVeR7K8/2QCK17HSsioPlTW9ZkzoWb3Lg==}
/@csstools/css-tokenizer@2.2.4:
resolution: {integrity: sha512-PuWRAewQLbDhGeTvFuq2oClaSCKPIBmHyIobCV39JHRYN0byDcUWJl5baPeNUcqrjtdMNqFooE0FGl31I3JOqw==}
engines: {node: ^14 || ^16 || >=18}
dev: true
/@csstools/media-query-list-parser@2.1.7(@csstools/css-parser-algorithms@2.5.0)(@csstools/css-tokenizer@2.2.3):
resolution: {integrity: sha512-lHPKJDkPUECsyAvD60joYfDmp8UERYxHGkFfyLJFTVK/ERJe0sVlIFLXU5XFxdjNDTerp5L4KeaKG+Z5S94qxQ==}
/@csstools/media-query-list-parser@2.1.9(@csstools/css-parser-algorithms@2.6.1)(@csstools/css-tokenizer@2.2.4):
resolution: {integrity: sha512-qqGuFfbn4rUmyOB0u8CVISIp5FfJ5GAR3mBrZ9/TKndHakdnm6pY0L/fbLcpPnrzwCyyTEZl1nUcXAYHEWneTA==}
engines: {node: ^14 || ^16 || >=18}
peerDependencies:
'@csstools/css-parser-algorithms': ^2.5.0
'@csstools/css-tokenizer': ^2.2.3
'@csstools/css-parser-algorithms': ^2.6.1
'@csstools/css-tokenizer': ^2.2.4
dependencies:
'@csstools/css-parser-algorithms': 2.5.0(@csstools/css-tokenizer@2.2.3)
'@csstools/css-tokenizer': 2.2.3
'@csstools/css-parser-algorithms': 2.6.1(@csstools/css-tokenizer@2.2.4)
'@csstools/css-tokenizer': 2.2.4
dev: true
/@csstools/selector-specificity@3.0.1(postcss-selector-parser@6.0.15):
resolution: {integrity: sha512-NPljRHkq4a14YzZ3YD406uaxh7s0g6eAq3L9aLOWywoqe8PkYamAvtsh7KNX6c++ihDrJ0RiU+/z7rGnhlZ5ww==}
/@csstools/selector-specificity@3.0.2(postcss-selector-parser@6.0.16):
resolution: {integrity: sha512-RpHaZ1h9LE7aALeQXmXrJkRG84ZxIsctEN2biEUmFyKpzFM3zZ35eUMcIzZFsw/2olQE6v69+esEqU2f1MKycg==}
engines: {node: ^14 || ^16 || >=18}
peerDependencies:
postcss-selector-parser: ^6.0.13
dependencies:
postcss-selector-parser: 6.0.15
postcss-selector-parser: 6.0.16
dev: true
/@ctrl/tinycolor@4.0.3:
@@ -785,6 +785,10 @@ packages:
tslib: 2.6.2
dev: false
/@dual-bundle/import-meta-resolve@4.0.0:
resolution: {integrity: sha512-ZKXyJeFAzcpKM2kk8ipoGIPUqx9BX52omTGnfwjJvxOCaZTM2wtDK7zN0aIgPRbT9XYAlha0HtmZ+XKteuh0Gw==}
dev: true
/@emotion/babel-plugin@11.11.0:
resolution: {integrity: sha512-m4HEDZleaaCH+XgDDsPF15Ht6wTLsgDTeR3WYj9Q/k76JtWhrJjcP4+/XlG8LGT/Rol9qUfOIztXeA84ATpqPQ==}
dependencies:
@@ -2235,10 +2239,6 @@ packages:
'@types/estree': 1.0.5
dev: false
/@types/estree@1.0.3:
resolution: {integrity: sha512-CS2rOaoQ/eAgAfcTfq6amKG7bsN+EMcgGY4FAFQdvSj2y1ixvOZTUA9mOtCai7E1SYu283XNw7urKK30nP3wkQ==}
dev: false
/@types/estree@1.0.5:
resolution: {integrity: sha512-/kYRxGDLWzHOB7q+wtSUQlFrtcdUccpfy+X+9iMBpHK8QLLhx2wIPYuS5DYtR9Wa/YlZAbIovy7qVdB1Aq6Lyw==}
@@ -2474,7 +2474,7 @@ packages:
/@ungap/structured-clone@1.2.0:
resolution: {integrity: sha512-zuVdFrMJiuCDQUMCzQaD6KL28MjnqqN8XnAqiEq9PNm/hCPTSGfrXCOfwj1ow4LFb/tNymJPwsNbVePc1xFqrQ==}
/@vitejs/plugin-react@4.2.1(vite@5.2.4):
/@vitejs/plugin-react@4.2.1(vite@5.2.5):
resolution: {integrity: sha512-oojO9IDc4nCUUi8qIR11KoQm0XFFLIwsRBwHRR4d/88IWghn1y6ckz/bJ8GHDCsYEJee8mDzqtJxh15/cisJNQ==}
engines: {node: ^14.18.0 || >=16.0.0}
peerDependencies:
@@ -2485,7 +2485,7 @@ packages:
'@babel/plugin-transform-react-jsx-source': 7.23.3(@babel/core@7.23.6)
'@types/babel__core': 7.20.5
react-refresh: 0.14.0
vite: 5.2.4(@types/node@20.11.30)(sass@1.72.0)
vite: 5.2.5(@types/node@20.11.30)(sass@1.72.0)
transitivePeerDependencies:
- supports-color
dev: true
@@ -4411,7 +4411,7 @@ packages:
array-union: 2.1.0
dir-glob: 3.0.1
fast-glob: 3.3.2
ignore: 5.3.0
ignore: 5.3.1
merge2: 1.4.1
slash: 3.0.0
dev: true
@@ -4501,7 +4501,7 @@ packages:
/hast-util-to-jsx-runtime@2.3.0:
resolution: {integrity: sha512-H/y0+IWPdsLLS738P8tDnrQ8Z+dj12zQQ6WC11TIM21C8WFVoIxcqWXf2H3hiTVZjF1AWqoimGwrTWecWrnmRQ==}
dependencies:
'@types/estree': 1.0.3
'@types/estree': 1.0.5
'@types/hast': 3.0.4
'@types/unist': 3.0.2
comma-separated-tokens: 2.0.3
@@ -4607,6 +4607,11 @@ packages:
engines: {node: '>= 4'}
dev: true
/ignore@5.3.1:
resolution: {integrity: sha512-5Fytz/IraMjqpwfd34ke28PTVMjZjJG2MPn5t7OE4eUCUNf8BAa7b5WUS9/Qvr6mwOQS7Mk6vdsMno5he+T8Xw==}
engines: {node: '>= 4'}
dev: true
/immutable@4.0.0:
resolution: {integrity: sha512-zIE9hX70qew5qTUjSS7wi1iwj/l7+m54KWU247nhM3v806UdGj1yDndXj+IOYxxtW9zyLI+xqFNZjTuDaLUqFw==}
dev: true
@@ -5096,6 +5101,10 @@ packages:
resolution: {integrity: sha512-Ne7wqW7/9Cz54PDt4I3tcV+hAyat8ypyOGzYRJQfdxnnjeWsTxt1cy8pjvvKeI5kfXuyvULyeeAvwvvtAX3ayQ==}
dev: true
/known-css-properties@0.30.0:
resolution: {integrity: sha512-VSWXYUnsPu9+WYKkfmJyLKtIvaRJi1kXUqVmBACORXZQxT5oZDsoZ2vQP+bQFDnWtpI/4eq3MLoRMjI2fnLzTQ==}
dev: true
/levn@0.4.1:
resolution: {integrity: sha512-+bT2uH4E5LGE7h/n3evcS/sQlJXCpIp6ym8OWJ5eV6+67Dsql/LaaT7qJBAt2rzfoa/5QBGBhxDix1dMt2kQKQ==}
engines: {node: '>= 0.8.0'}
@@ -5373,8 +5382,8 @@ packages:
engines: {node: '>=16.10'}
dev: true
/meow@13.1.0:
resolution: {integrity: sha512-o5R/R3Tzxq0PJ3v3qcQJtSvSE9nKOLSAaDuuoMzDVuGTwHdccMWcYomh9Xolng2tjT6O/Y83d+0coVGof6tqmA==}
/meow@13.2.0:
resolution: {integrity: sha512-pxQJQzB6djGPXh08dacEloMFopsOqGVRKFPYvPOt9XDZ1HasbgDZA74CJGreSU4G3Ak7EFJGoiH2auq+yXISgA==}
engines: {node: '>=18'}
dev: true
@@ -6036,6 +6045,14 @@ packages:
util-deprecate: 1.0.2
dev: true
/postcss-selector-parser@6.0.16:
resolution: {integrity: sha512-A0RVJrX+IUkVZbW3ClroRWurercFhieevHB38sr2+l9eUClMqome3LmEmnhlNy+5Mr2EYN6B2Kaw9wYdd+VHiw==}
engines: {node: '>=4'}
dependencies:
cssesc: 3.0.0
util-deprecate: 1.0.2
dev: true
/postcss-sorting@8.0.2(postcss@8.4.38):
resolution: {integrity: sha512-M9dkSrmU00t/jK7rF6BZSZauA5MAaBW4i5EnJXspMwt4iqTh/L9j6fgMnbElEOfyRyfLfVbIHj/R52zHzAPe1Q==}
peerDependencies:
@@ -6803,7 +6820,7 @@ packages:
inline-style-parser: 0.2.2
dev: false
/stylelint-config-html@1.1.0(postcss-html@1.6.0)(stylelint@16.2.1):
/stylelint-config-html@1.1.0(postcss-html@1.6.0)(stylelint@16.3.0):
resolution: {integrity: sha512-IZv4IVESjKLumUGi+HWeb7skgO6/g4VMuAYrJdlqQFndgbj6WJAXPhaysvBiXefX79upBdQVumgYcdd17gCpjQ==}
engines: {node: ^12 || >=14}
peerDependencies:
@@ -6811,57 +6828,57 @@ packages:
stylelint: '>=14.0.0'
dependencies:
postcss-html: 1.6.0
stylelint: 16.2.1(typescript@5.4.3)
stylelint: 16.3.0(typescript@5.4.3)
dev: true
/stylelint-config-recess-order@5.0.0(stylelint@16.2.1):
/stylelint-config-recess-order@5.0.0(stylelint@16.3.0):
resolution: {integrity: sha512-D+/Got844O96No2mj/H2NhLjj555iKAy/Mea+JCerfKB9TBKQW3/IudSVkTCxE4QiRDLldfH15x6FH1D1Anjhw==}
peerDependencies:
stylelint: '>=16'
dependencies:
stylelint: 16.2.1(typescript@5.4.3)
stylelint-order: 6.0.4(stylelint@16.2.1)
stylelint: 16.3.0(typescript@5.4.3)
stylelint-order: 6.0.4(stylelint@16.3.0)
dev: true
/stylelint-config-recommended@14.0.0(stylelint@16.2.1):
/stylelint-config-recommended@14.0.0(stylelint@16.3.0):
resolution: {integrity: sha512-jSkx290CglS8StmrLp2TxAppIajzIBZKYm3IxT89Kg6fGlxbPiTiyH9PS5YUuVAFwaJLl1ikiXX0QWjI0jmgZQ==}
engines: {node: '>=18.12.0'}
peerDependencies:
stylelint: ^16.0.0
dependencies:
stylelint: 16.2.1(typescript@5.4.3)
stylelint: 16.3.0(typescript@5.4.3)
dev: true
/stylelint-config-standard@36.0.0(stylelint@16.2.1):
/stylelint-config-standard@36.0.0(stylelint@16.3.0):
resolution: {integrity: sha512-3Kjyq4d62bYFp/Aq8PMKDwlgUyPU4nacXsjDLWJdNPRUgpuxALu1KnlAHIj36cdtxViVhXexZij65yM0uNIHug==}
engines: {node: '>=18.12.0'}
peerDependencies:
stylelint: ^16.1.0
dependencies:
stylelint: 16.2.1(typescript@5.4.3)
stylelint-config-recommended: 14.0.0(stylelint@16.2.1)
stylelint: 16.3.0(typescript@5.4.3)
stylelint-config-recommended: 14.0.0(stylelint@16.3.0)
dev: true
/stylelint-declaration-block-no-ignored-properties@2.8.0(stylelint@16.2.1):
/stylelint-declaration-block-no-ignored-properties@2.8.0(stylelint@16.3.0):
resolution: {integrity: sha512-Ws8Cav7Y+SPN0JsV407LrnNXWOrqGjxShf+37GBtnU/C58Syve9c0+I/xpLcFOosST3ternykn3Lp77f3ITnFw==}
engines: {node: '>=6'}
peerDependencies:
stylelint: ^7.0.0 || ^8.0.0 || ^9.0.0 || ^10.0.0 || ^11.0.0 || ^12.0.0 || ^13.0.0 || ^14.0.0 || ^15.0.0 || ^16.0.0
dependencies:
stylelint: 16.2.1(typescript@5.4.3)
stylelint: 16.3.0(typescript@5.4.3)
dev: true
/stylelint-order@6.0.4(stylelint@16.2.1):
/stylelint-order@6.0.4(stylelint@16.3.0):
resolution: {integrity: sha512-0UuKo4+s1hgQ/uAxlYU4h0o0HS4NiQDud0NAUNI0aa8FJdmYHA5ZZTFHiV5FpmE3071e9pZx5j0QpVJW5zOCUA==}
peerDependencies:
stylelint: ^14.0.0 || ^15.0.0 || ^16.0.1
dependencies:
postcss: 8.4.38
postcss-sorting: 8.0.2(postcss@8.4.38)
stylelint: 16.2.1(typescript@5.4.3)
stylelint: 16.3.0(typescript@5.4.3)
dev: true
/stylelint-scss@6.2.1(stylelint@16.2.1):
/stylelint-scss@6.2.1(stylelint@16.3.0):
resolution: {integrity: sha512-ZoGLbVb1keZYRVGQlhB8G6sZOoNqw61whzzzGFWp05N12ErqLFfBv3JPrXiMLZaW98sBS7K/vUQhRnvUj4vwdw==}
engines: {node: '>=18.12.0'}
peerDependencies:
@@ -6872,18 +6889,19 @@ packages:
postcss-resolve-nested-selector: 0.1.1
postcss-selector-parser: 6.0.15
postcss-value-parser: 4.2.0
stylelint: 16.2.1(typescript@5.4.3)
stylelint: 16.3.0(typescript@5.4.3)
dev: true
/stylelint@16.2.1(typescript@5.4.3):
resolution: {integrity: sha512-SfIMGFK+4n7XVAyv50CpVfcGYWG4v41y6xG7PqOgQSY8M/PgdK0SQbjWFblxjJZlN9jNq879mB4BCZHJRIJ1hA==}
/stylelint@16.3.0(typescript@5.4.3):
resolution: {integrity: sha512-hqC6xNTbQ5HRGQXfIW4HwXcx09raIFz4W4XFbraeqWqYRVVY/ibYvI0dsu0ORMQY8re2bpDdCAeIa2cm+QJ4Sw==}
engines: {node: '>=18.12.0'}
hasBin: true
dependencies:
'@csstools/css-parser-algorithms': 2.5.0(@csstools/css-tokenizer@2.2.3)
'@csstools/css-tokenizer': 2.2.3
'@csstools/media-query-list-parser': 2.1.7(@csstools/css-parser-algorithms@2.5.0)(@csstools/css-tokenizer@2.2.3)
'@csstools/selector-specificity': 3.0.1(postcss-selector-parser@6.0.15)
'@csstools/css-parser-algorithms': 2.6.1(@csstools/css-tokenizer@2.2.4)
'@csstools/css-tokenizer': 2.2.4
'@csstools/media-query-list-parser': 2.1.9(@csstools/css-parser-algorithms@2.6.1)(@csstools/css-tokenizer@2.2.4)
'@csstools/selector-specificity': 3.0.2(postcss-selector-parser@6.0.16)
'@dual-bundle/import-meta-resolve': 4.0.0
balanced-match: 2.0.0
colord: 2.9.3
cosmiconfig: 9.0.0(typescript@5.4.3)
@@ -6897,19 +6915,19 @@ packages:
globby: 11.1.0
globjoin: 0.1.4
html-tags: 3.3.1
ignore: 5.3.0
ignore: 5.3.1
imurmurhash: 0.1.4
is-plain-object: 5.0.0
known-css-properties: 0.29.0
known-css-properties: 0.30.0
mathml-tag-names: 2.1.3
meow: 13.1.0
meow: 13.2.0
micromatch: 4.0.5
normalize-path: 3.0.0
picocolors: 1.0.0
postcss: 8.4.38
postcss-resolve-nested-selector: 0.1.1
postcss-safe-parser: 7.0.0(postcss@8.4.38)
postcss-selector-parser: 6.0.15
postcss-selector-parser: 6.0.16
postcss-value-parser: 4.2.0
resolve-from: 5.0.0
string-width: 4.2.3
@@ -7334,7 +7352,7 @@ packages:
monaco-editor: 0.47.0
dev: true
/vite-plugin-svgr@4.2.0(typescript@5.4.3)(vite@5.2.4):
/vite-plugin-svgr@4.2.0(typescript@5.4.3)(vite@5.2.5):
resolution: {integrity: sha512-SC7+FfVtNQk7So0XMjrrtLAbEC8qjFPifyD7+fs/E6aaNdVde6umlVVh0QuwDLdOMu7vp5RiGFsB70nj5yo0XA==}
peerDependencies:
vite: ^2.6.0 || 3 || 4 || 5
@@ -7342,15 +7360,15 @@ packages:
'@rollup/pluginutils': 5.0.5
'@svgr/core': 8.1.0(typescript@5.4.3)
'@svgr/plugin-jsx': 8.1.0(@svgr/core@8.1.0)
vite: 5.2.4(@types/node@20.11.30)(sass@1.72.0)
vite: 5.2.5(@types/node@20.11.30)(sass@1.72.0)
transitivePeerDependencies:
- rollup
- supports-color
- typescript
dev: true
/vite@5.2.4(@types/node@20.11.30)(sass@1.72.0):
resolution: {integrity: sha512-vjFghvHWidBTinu5TCymJk/lRHlR5ljqB83yugr0HA1xspUPdOZHqbqDLnZ8f9/jINrtFHTCYYyIUi+o+Q5iyg==}
/vite@5.2.5(@types/node@20.11.30)(sass@1.72.0):
resolution: {integrity: sha512-a+rTAqkMmJ2hQpC6dfAyyc5M0YLH3BGZKLpA6pU9AhzlcK1YZS8P/ov9OcdHxaf+j0sM0DIh/txH7ydTHUpISg==}
engines: {node: ^18.0.0 || >=20.0.0}
hasBin: true
peerDependencies:
echo/internal/cli/config.go
+4 -1
View File
@@ -102,7 +102,10 @@ func MustStartComponents(mainCtx context.Context, cfg *config.Config) {
}
go func() {
metrics.EhcoAlive.Set(metrics.EhcoAliveStateRunning)
cliLogger.Fatalf("StartRelayServer meet err=%s", rs.Start(mainCtx))
sErr := rs.Start(mainCtx)
if sErr != nil {
cliLogger.Fatalf("StartRelayServer meet err=%s", sErr.Error())
}
}()
if cfg.NeedStartWebServer() {
hysteria/app/go.mod
+2 -2
View File
@@ -19,7 +19,7 @@ require (
)
require (
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d // indirect
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822 // indirect
github.com/babolivier/go-doh-client v0.0.0-20201028162107-a76cff4cb8b6 // indirect
github.com/davecgh/go-spew v1.1.1 // indirect
github.com/fsnotify/fsnotify v1.7.0 // indirect
@@ -50,7 +50,7 @@ require (
github.com/txthinking/runnergroup v0.0.0-20210608031112-152c7c4432bf // indirect
github.com/vishvananda/netns v0.0.0-20211101163701-50045581ed74 // indirect
go.uber.org/atomic v1.11.0 // indirect
go.uber.org/mock v0.3.0 // indirect
go.uber.org/mock v0.4.0 // indirect
go.uber.org/multierr v1.11.0 // indirect
go4.org/netipx v0.0.0-20231129151722-fdeea329fbba // indirect
golang.org/x/crypto v0.19.0 // indirect
hysteria/app/go.sum
+6 -4
View File
@@ -40,8 +40,8 @@ github.com/BurntSushi/toml v0.3.1/go.mod h1:xHWCNGjB5oqiDr8zfno3MHue2Ht5sIBksp03
github.com/BurntSushi/xgb v0.0.0-20160522181843-27f122750802/go.mod h1:IVnqGOEym/WlBOVXweHU+Q+/VP0lqqI8lqeDx9IjBqo=
github.com/apernet/go-tproxy v0.0.0-20230809025308-8f4723fd742f h1:uVh0qpEslrWjgzx9vOcyCqsOY3c9kofDZ1n+qaw35ZY=
github.com/apernet/go-tproxy v0.0.0-20230809025308-8f4723fd742f/go.mod h1:xkkq9D4ygcldQQhKS/w9CadiCKwCngU7K9E3DaKahpM=
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d h1:K1DMSNtPcaZ/lihYmOHnjThNfUX7cD6SNuVRFnVLVmI=
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d/go.mod h1:4GInxO6ypy63J2NaO5rQx1wRp6K8YHI6zqLG+VswU6I=
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822 h1:+ZSzRxSMg1+fLTQKcIUvD2cCCgS+1rtyRhs+NL5oBgA=
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822/go.mod h1:j3QaAM7sVJqptDQyIQRWA6mASCfuxoHJszn67JQh1GE=
github.com/apernet/sing-tun v0.2.6-0.20240323130332-b9f6511036ad h1:QzQ2sKpc9o42HNRR8ukM5uMC/RzR2HgZd/Nvaqol2C0=
github.com/apernet/sing-tun v0.2.6-0.20240323130332-b9f6511036ad/go.mod h1:S5IydyLSN/QAfvY+r2GoomPJ6hidtXWm/Ad18sJVssk=
github.com/babolivier/go-doh-client v0.0.0-20201028162107-a76cff4cb8b6 h1:4NNbNM2Iq/k57qEu7WfL67UrbPq1uFWxW4qODCohi+0=
@@ -259,8 +259,8 @@ go.uber.org/atomic v1.11.0/go.mod h1:LUxbIzbOniOlMKjJjyPfpl4v+PKK2cNJn91OQbhoJI0
go.uber.org/goleak v1.1.11/go.mod h1:cwTWslyiVhfpKIDGSZEM2HlOvcqm+tG4zioyIeLoqMQ=
go.uber.org/goleak v1.2.1 h1:NBol2c7O1ZokfZ0LEU9K6Whx/KnwvepVetCUhtKja4A=
go.uber.org/goleak v1.2.1/go.mod h1:qlT2yGI9QafXHhZZLxlSuNsMw3FFLxBr+tBRlmO1xH4=
go.uber.org/mock v0.3.0 h1:3mUxI1No2/60yUYax92Pt8eNOEecx2D3lcXZh2NEZJo=
go.uber.org/mock v0.3.0/go.mod h1:a6FSlNadKUHUa9IP5Vyt1zh4fC7uAwxMutEAscFbkZc=
go.uber.org/mock v0.4.0 h1:VcM4ZOtdbR4f6VXfiOpwpVJDL6lCReaZ6mw31wqh7KU=
go.uber.org/mock v0.4.0/go.mod h1:a6FSlNadKUHUa9IP5Vyt1zh4fC7uAwxMutEAscFbkZc=
go.uber.org/multierr v1.6.0/go.mod h1:cdWPpRnG4AhwMwsgIHip0KRBQjJy5kYEpYjJxpXp9iU=
go.uber.org/multierr v1.11.0 h1:blXXJkSxSSfBVBlC76pxqeO+LN3aDfLQo+309xJstO0=
go.uber.org/multierr v1.11.0/go.mod h1:20+QtiLqy0Nd6FdQB9TLXag12DsQkrbs3htMFfDN80Y=
@@ -440,6 +440,8 @@ golang.org/x/text v0.14.0/go.mod h1:18ZOQIKpY8NJVqYksKHtTdi31H5itFRjB5/qKTNYzSU=
golang.org/x/time v0.0.0-20181108054448-85acf8d2951c/go.mod h1:tRJNPiyCQ0inRvYxbN9jk5I+vvW/OXSQhTDSoE431IQ=
golang.org/x/time v0.0.0-20190308202827-9d24e82272b4/go.mod h1:tRJNPiyCQ0inRvYxbN9jk5I+vvW/OXSQhTDSoE431IQ=
golang.org/x/time v0.0.0-20191024005414-555d28b269f0/go.mod h1:tRJNPiyCQ0inRvYxbN9jk5I+vvW/OXSQhTDSoE431IQ=
golang.org/x/time v0.5.0 h1:o7cqy6amK/52YcAKIPlM3a+Fpj35zvRj2TP+e1xFSfk=
golang.org/x/time v0.5.0/go.mod h1:3BpzKBy/shNhVucY/MWOyx10tF3SFh9QdLuxbVysPQM=
golang.org/x/tools v0.0.0-20180917221912-90fa682c2a6e/go.mod h1:n7NCudcB/nEzxVGmLbDWY5pfWTLqBcC2KZ6jyYvM4mQ=
golang.org/x/tools v0.0.0-20190114222345-bf090417da8b/go.mod h1:n7NCudcB/nEzxVGmLbDWY5pfWTLqBcC2KZ6jyYvM4mQ=
golang.org/x/tools v0.0.0-20190226205152-f727befe758c/go.mod h1:9Yl7xja0Znq3iFh3HoIrodX9oNMXvdceNzlUR8zjMvY=
hysteria/core/go.mod
+3 -3
View File
@@ -3,11 +3,11 @@ module github.com/apernet/hysteria/core
go 1.21
require (
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822
github.com/stretchr/testify v1.8.4
go.uber.org/goleak v1.2.1
golang.org/x/exp v0.0.0-20221205204356-47842c84f3db
golang.org/x/time v0.4.0
golang.org/x/time v0.5.0
)
require (
@@ -20,7 +20,7 @@ require (
github.com/pmezard/go-difflib v1.0.0 // indirect
github.com/quic-go/qpack v0.4.0 // indirect
github.com/stretchr/objx v0.5.0 // indirect
go.uber.org/mock v0.3.0 // indirect
go.uber.org/mock v0.4.0 // indirect
golang.org/x/crypto v0.19.0 // indirect
golang.org/x/mod v0.12.0 // indirect
golang.org/x/net v0.21.0 // indirect
hysteria/core/go.sum
+6 -6
View File
@@ -1,5 +1,5 @@
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d h1:K1DMSNtPcaZ/lihYmOHnjThNfUX7cD6SNuVRFnVLVmI=
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d/go.mod h1:4GInxO6ypy63J2NaO5rQx1wRp6K8YHI6zqLG+VswU6I=
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822 h1:+ZSzRxSMg1+fLTQKcIUvD2cCCgS+1rtyRhs+NL5oBgA=
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822/go.mod h1:j3QaAM7sVJqptDQyIQRWA6mASCfuxoHJszn67JQh1GE=
github.com/chzyer/logex v1.1.10/go.mod h1:+Ywpsq7O8HXn0nuIou7OrIPyXbp3wmkHB+jjWRnGsAI=
github.com/chzyer/readline v0.0.0-20180603132655-2972be24d48e/go.mod h1:nSuG5e5PlCu98SY8svDHJxuZscDgtXS6KTTbou5AhLI=
github.com/chzyer/test v0.0.0-20180213035817-a1ea475d72b1/go.mod h1:Q3SI9o4m/ZMnBNeIyt5eFwwo7qiLfzFZmjNmxjkiQlU=
@@ -43,8 +43,8 @@ github.com/stretchr/testify v1.8.4 h1:CcVxjf3Q8PM0mHUKJCdn+eZZtm5yQwehR5yeSVQQcU
github.com/stretchr/testify v1.8.4/go.mod h1:sz/lmYIOXD/1dqDmKjjqLyZ2RngseejIcXlSw2iwfAo=
go.uber.org/goleak v1.2.1 h1:NBol2c7O1ZokfZ0LEU9K6Whx/KnwvepVetCUhtKja4A=
go.uber.org/goleak v1.2.1/go.mod h1:qlT2yGI9QafXHhZZLxlSuNsMw3FFLxBr+tBRlmO1xH4=
go.uber.org/mock v0.3.0 h1:3mUxI1No2/60yUYax92Pt8eNOEecx2D3lcXZh2NEZJo=
go.uber.org/mock v0.3.0/go.mod h1:a6FSlNadKUHUa9IP5Vyt1zh4fC7uAwxMutEAscFbkZc=
go.uber.org/mock v0.4.0 h1:VcM4ZOtdbR4f6VXfiOpwpVJDL6lCReaZ6mw31wqh7KU=
go.uber.org/mock v0.4.0/go.mod h1:a6FSlNadKUHUa9IP5Vyt1zh4fC7uAwxMutEAscFbkZc=
golang.org/x/crypto v0.19.0 h1:ENy+Az/9Y1vSrlrvBSyna3PITt4tiZLf7sgCjZBX7Wo=
golang.org/x/crypto v0.19.0/go.mod h1:Iy9bg/ha4yyC70EfRS8jz+B6ybOBKMaSxLj6P6oBDfU=
golang.org/x/exp v0.0.0-20221205204356-47842c84f3db h1:D/cFflL63o2KSLJIwjlcIt8PR064j/xsmdEJL/YvY/o=
@@ -58,8 +58,8 @@ golang.org/x/sys v0.17.0 h1:25cE3gD+tdBA7lp7QfhuV+rJiE9YXTcS3VG1SqssI/Y=
golang.org/x/sys v0.17.0/go.mod h1:/VUhepiaJMQUp4+oa/7Zr1D23ma6VTLIYjOOTFZPUcA=
golang.org/x/text v0.14.0 h1:ScX5w1eTa3QqT8oi6+ziP7dTV1S2+ALU0bI+0zXKWiQ=
golang.org/x/text v0.14.0/go.mod h1:18ZOQIKpY8NJVqYksKHtTdi31H5itFRjB5/qKTNYzSU=
golang.org/x/time v0.4.0 h1:Z81tqI5ddIoXDPvVQ7/7CC9TnLM7ubaFG2qXYd5BbYY=
golang.org/x/time v0.4.0/go.mod h1:3BpzKBy/shNhVucY/MWOyx10tF3SFh9QdLuxbVysPQM=
golang.org/x/time v0.5.0 h1:o7cqy6amK/52YcAKIPlM3a+Fpj35zvRj2TP+e1xFSfk=
golang.org/x/time v0.5.0/go.mod h1:3BpzKBy/shNhVucY/MWOyx10tF3SFh9QdLuxbVysPQM=
golang.org/x/tools v0.11.1 h1:ojD5zOW8+7dOGzdnNgersm8aPfcDjhMp12UfG93NIMc=
golang.org/x/tools v0.11.1/go.mod h1:anzJrxPjNtfgiYQYirP2CPGzGLxrH2u2QBhn6Bf3qY8=
google.golang.org/protobuf v1.33.0 h1:uNO2rsAINq/JlFpSdYEKIZ0uKD/R9cpdv0T+yoGwGmI=
hysteria/core/internal/integration_tests/close_test.go
+5 -2
View File
@@ -2,6 +2,7 @@ package integration_tests
import (
"io"
"sync"
"testing"
"time"
@@ -48,13 +49,14 @@ func TestClientServerTCPClose(t *testing.T) {
// Server outbound connection should write the same thing, then close.
sobConn := mocks.NewMockConn(t)
sobConnCh := make(chan struct{}) // For close signal only
sobConnChCloseFunc := sync.OnceFunc(func() { close(sobConnCh) })
sobConn.EXPECT().Read(mock.Anything).RunAndReturn(func(bs []byte) (int, error) {
<-sobConnCh
return 0, io.EOF
})
sobConn.EXPECT().Write([]byte("happy")).Return(5, nil)
sobConn.EXPECT().Close().RunAndReturn(func() error {
close(sobConnCh)
sobConnChCloseFunc()
return nil
})
serverOb.EXPECT().TCP(addr).Return(sobConn, nil).Once()
@@ -133,6 +135,7 @@ func TestClientServerUDPIdleTimeout(t *testing.T) {
// to trigger the server's UDP idle timeout.
sobConn := mocks.NewMockUDPConn(t)
sobConnCh := make(chan []byte, 1)
sobConnChCloseFunc := sync.OnceFunc(func() { close(sobConnCh) })
sobConn.EXPECT().ReadFrom(mock.Anything).RunAndReturn(func(bs []byte) (int, string, error) {
d := <-sobConnCh
if d == nil {
@@ -167,7 +170,7 @@ func TestClientServerUDPIdleTimeout(t *testing.T) {
}
// Now we wait for 3 seconds, the server should close the UDP session.
sobConn.EXPECT().Close().RunAndReturn(func() error {
close(sobConnCh)
sobConnChCloseFunc()
return nil
})
eventLogger.EXPECT().UDPError(mock.Anything, mock.Anything, uint32(1), nil).Once()
hysteria/core/internal/integration_tests/trafficlogger_test.go
+7 -4
View File
@@ -2,6 +2,7 @@ package integration_tests
import (
"io"
"sync"
"testing"
"time"
@@ -46,6 +47,7 @@ func TestClientServerTrafficLoggerTCP(t *testing.T) {
sobConn := mocks.NewMockConn(t)
sobConnCh := make(chan []byte, 1)
sobConnChCloseFunc := sync.OnceFunc(func() { close(sobConnCh) })
sobConn.EXPECT().Read(mock.Anything).RunAndReturn(func(bs []byte) (int, error) {
b := <-sobConnCh
if b == nil {
@@ -55,9 +57,9 @@ func TestClientServerTrafficLoggerTCP(t *testing.T) {
}
})
sobConn.EXPECT().Close().RunAndReturn(func() error {
close(sobConnCh)
sobConnChCloseFunc()
return nil
}).Once()
})
serverOb.EXPECT().TCP(addr).Return(sobConn, nil).Once()
conn, err := c.TCP(addr)
@@ -125,6 +127,7 @@ func TestClientServerTrafficLoggerUDP(t *testing.T) {
sobConn := mocks.NewMockUDPConn(t)
sobConnCh := make(chan []byte, 1)
sobConnChCloseFunc := sync.OnceFunc(func() { close(sobConnCh) })
sobConn.EXPECT().ReadFrom(mock.Anything).RunAndReturn(func(bs []byte) (int, string, error) {
b := <-sobConnCh
if b == nil {
@@ -134,9 +137,9 @@ func TestClientServerTrafficLoggerUDP(t *testing.T) {
}
})
sobConn.EXPECT().Close().RunAndReturn(func() error {
close(sobConnCh)
sobConnChCloseFunc()
return nil
}).Once()
})
serverOb.EXPECT().UDP(addr).Return(sobConn, nil).Once()
conn, err := c.UDP()
hysteria/extras/go.mod
+2 -2
View File
@@ -15,7 +15,7 @@ require (
)
require (
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d // indirect
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822 // indirect
github.com/davecgh/go-spew v1.1.1 // indirect
github.com/go-task/slim-sprig v0.0.0-20230315185526-52ccab3ef572 // indirect
github.com/google/pprof v0.0.0-20210407192527-94a9f03dee38 // indirect
@@ -25,7 +25,7 @@ require (
github.com/quic-go/qpack v0.4.0 // indirect
github.com/stretchr/objx v0.5.0 // indirect
github.com/txthinking/runnergroup v0.0.0-20210608031112-152c7c4432bf // indirect
go.uber.org/mock v0.3.0 // indirect
go.uber.org/mock v0.4.0 // indirect
golang.org/x/exp v0.0.0-20221205204356-47842c84f3db // indirect
golang.org/x/mod v0.12.0 // indirect
golang.org/x/sys v0.17.0 // indirect
hysteria/extras/go.sum
+6 -4
View File
@@ -1,5 +1,5 @@
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d h1:K1DMSNtPcaZ/lihYmOHnjThNfUX7cD6SNuVRFnVLVmI=
github.com/apernet/quic-go v0.41.1-0.20240301003057-e18162de481d/go.mod h1:4GInxO6ypy63J2NaO5rQx1wRp6K8YHI6zqLG+VswU6I=
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822 h1:+ZSzRxSMg1+fLTQKcIUvD2cCCgS+1rtyRhs+NL5oBgA=
github.com/apernet/quic-go v0.42.1-0.20240323215309-32a339817822/go.mod h1:j3QaAM7sVJqptDQyIQRWA6mASCfuxoHJszn67JQh1GE=
github.com/babolivier/go-doh-client v0.0.0-20201028162107-a76cff4cb8b6 h1:4NNbNM2Iq/k57qEu7WfL67UrbPq1uFWxW4qODCohi+0=
github.com/babolivier/go-doh-client v0.0.0-20201028162107-a76cff4cb8b6/go.mod h1:J29hk+f9lJrblVIfiJOtTFk+OblBawmib4uz/VdKzlg=
github.com/chzyer/logex v1.1.10/go.mod h1:+Ywpsq7O8HXn0nuIou7OrIPyXbp3wmkHB+jjWRnGsAI=
@@ -54,8 +54,8 @@ github.com/txthinking/socks5 v0.0.0-20230325130024-4230056ae301/go.mod h1:ntmMHL
github.com/yuin/goldmark v1.4.13/go.mod h1:6yULJ656Px+3vBD8DxQVa3kxgyrAnzto9xy5taEt/CY=
go.uber.org/goleak v1.2.1 h1:NBol2c7O1ZokfZ0LEU9K6Whx/KnwvepVetCUhtKja4A=
go.uber.org/goleak v1.2.1/go.mod h1:qlT2yGI9QafXHhZZLxlSuNsMw3FFLxBr+tBRlmO1xH4=
go.uber.org/mock v0.3.0 h1:3mUxI1No2/60yUYax92Pt8eNOEecx2D3lcXZh2NEZJo=
go.uber.org/mock v0.3.0/go.mod h1:a6FSlNadKUHUa9IP5Vyt1zh4fC7uAwxMutEAscFbkZc=
go.uber.org/mock v0.4.0 h1:VcM4ZOtdbR4f6VXfiOpwpVJDL6lCReaZ6mw31wqh7KU=
go.uber.org/mock v0.4.0/go.mod h1:a6FSlNadKUHUa9IP5Vyt1zh4fC7uAwxMutEAscFbkZc=
golang.org/x/crypto v0.0.0-20190308221718-c2843e01d9a2/go.mod h1:djNgcEr1/C05ACkg1iLfiJU5Ep61QUkGW8qpdssI0+w=
golang.org/x/crypto v0.0.0-20210921155107-089bfa567519/go.mod h1:GvvjBRRGRdwPK5ydBHafDWAxML/pGHZbMvKqRZ5+Abc=
golang.org/x/crypto v0.19.0 h1:ENy+Az/9Y1vSrlrvBSyna3PITt4tiZLf7sgCjZBX7Wo=
@@ -95,6 +95,8 @@ golang.org/x/text v0.3.7/go.mod h1:u+2+/6zg+i71rQMx5EYifcz6MCKuco9NR6JIITiCfzQ=
golang.org/x/text v0.4.0/go.mod h1:mrYo+phRRbMaCq/xk9113O4dZlRixOauAjOtrjsXDZ8=
golang.org/x/text v0.14.0 h1:ScX5w1eTa3QqT8oi6+ziP7dTV1S2+ALU0bI+0zXKWiQ=
golang.org/x/text v0.14.0/go.mod h1:18ZOQIKpY8NJVqYksKHtTdi31H5itFRjB5/qKTNYzSU=
golang.org/x/time v0.5.0 h1:o7cqy6amK/52YcAKIPlM3a+Fpj35zvRj2TP+e1xFSfk=
golang.org/x/time v0.5.0/go.mod h1:3BpzKBy/shNhVucY/MWOyx10tF3SFh9QdLuxbVysPQM=
golang.org/x/tools v0.0.0-20180917221912-90fa682c2a6e/go.mod h1:n7NCudcB/nEzxVGmLbDWY5pfWTLqBcC2KZ6jyYvM4mQ=
golang.org/x/tools v0.0.0-20191119224855-298f0cb1881e/go.mod h1:b+2E5dAYhXwXZwtnZ6UAqBI28+e2cm9otk0dWdXHAEo=
golang.org/x/tools v0.1.12/go.mod h1:hNGJHUnrk76NpqgfD5Aqm5Crs+Hm0VOH/i9J2+nxYbc=
lede/target/linux/rockchip/Makefile
+2 -2
View File
@@ -7,8 +7,8 @@ BOARDNAME:=Rockchip
FEATURES:=ext4 audio usb usbgadget display gpio fpu pci pcie rootfs-part boot-part squashfs
SUBTARGETS:=armv8
KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=6.1
KERNEL_PATCHVER:=6.1
KERNEL_TESTING_PATCHVER:=6.6
define Target/Description
Build firmware image for Rockchip SoC devices.
lede/target/linux/rockchip/armv8/config-6.6
+726
View File
@@ -0,0 +1,726 @@
CONFIG_64BIT=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_FORCE_MAX_ORDER=10
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=33
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ARCH_SELECTS_KEXEC_FILE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_ARC_EMAC_CORE=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CNP=y
CONFIG_ARM64_EPAN=y
CONFIG_ARM64_ERRATUM_1742098=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_858921=y
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PAN=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_RAS_EXTN=y
CONFIG_ARM64_SVE=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=48
# CONFIG_ARM64_VA_BITS_39 is not set
CONFIG_ARM64_VA_BITS_48=y
CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
# CONFIG_ARMV8_DEPRECATED is not set
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_ARM_MHU=y
# CONFIG_ARM_MHU_V2 is not set
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_RK3328_DMC_DEVFREQ=y
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
# CONFIG_ARM_SCMI_CPUFREQ is not set
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
CONFIG_ARM_SCMI_POWER_CONTROL=y
CONFIG_ARM_SCMI_POWER_DOMAIN=y
CONFIG_ARM_SCMI_PROTOCOL=y
# CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set
CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set
CONFIG_ARM_SCPI_CPUFREQ=y
CONFIG_ARM_SCPI_POWER_DOMAIN=y
CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ARM_SMMU=y
CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y
# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set
CONFIG_ARM_SMMU_V3=y
# CONFIG_ARM_SMMU_V3_SVA is not set
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_GPIO=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_BLK_DEV_BSG=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_BSG_COMMON=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_INTEGRITY=y
CONFIG_BLK_DEV_INTEGRITY_T10=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NVME=y
CONFIG_BLK_DEV_PCIESSD_MTIP32XX=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BRCMSTB_GISB_ARB=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_BUFFER_HEAD=y
CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CHARGER_GPIO=y
# CONFIG_CHARGER_RK817 is not set
CONFIG_CLKSRC_MMIO=y
CONFIG_CLK_PX30=y
CONFIG_CLK_RK3308=y
CONFIG_CLK_RK3328=y
CONFIG_CLK_RK3368=y
CONFIG_CLK_RK3399=y
CONFIG_CLK_RK3568=y
CONFIG_CLK_RK3588=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=64
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_ROCKCHIP=y
CONFIG_COMMON_CLK_SCMI=y
CONFIG_COMMON_CLK_SCPI=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT=y
CONFIG_COMPAT_32BIT_TIME=y
# CONFIG_COMPAT_ALIGNMENT_FIXUPS is not set
CONFIG_COMPAT_BINFMT_ELF=y
CONFIG_COMPAT_OLD_SIGACTION=y
CONFIG_CONFIGFS_FS=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_FREQ=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_ISOLATION=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_THERMAL=y
CONFIG_CRASH_CORE=y
CONFIG_CRASH_DUMP=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC64=y
CONFIG_CRC64_ROCKSOFT=y
CONFIG_CRC_T10DIF=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRC64_ROCKSOFT=y
CONFIG_CRYPTO_CRCT10DIF=y
CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SM4=y
CONFIG_CRYPTO_SM4_ARM64_CE_BLK=y
CONFIG_CRYPTO_SM4_ARM64_CE_CCM=y
CONFIG_CRYPTO_SM4_ARM64_CE_GCM=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y
# CONFIG_DEVFREQ_GOV_PASSIVE is not set
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
CONFIG_DEVFREQ_GOV_POWERSAVE=y
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
CONFIG_DEVFREQ_GOV_USERSPACE=y
# CONFIG_DEVFREQ_THERMAL is not set
CONFIG_DEVMEM=y
# CONFIG_DEVPORT is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMADEVICES=y
CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y
CONFIG_DMA_CMA=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DT_IDLE_GENPD=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_DWMAC_DWC_QOS_ETH=y
CONFIG_DWMAC_GENERIC=y
CONFIG_DWMAC_ROCKCHIP=y
CONFIG_DW_WATCHDOG=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_EMAC_ROCKCHIP=y
CONFIG_ENERGY_MODEL=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXTCON=y
CONFIG_F2FS_FS=y
CONFIG_FANOTIFY=y
CONFIG_FHANDLE=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FORTIFY_SOURCE is not set
CONFIG_FRAME_POINTER=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FUNCTION_ALIGNMENT=4
CONFIG_FUNCTION_ALIGNMENT_4B=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_ROCKCHIP=y
# CONFIG_HARDENED_USERCOPY is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HID=y
CONFIG_HID_SUPPORT=y
CONFIG_HOTPLUG_CORE_SYNC=y
CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HOTPLUG_PCI=y
# CONFIG_HOTPLUG_PCI_CPCI is not set
# CONFIG_HOTPLUG_PCI_PCIE is not set
# CONFIG_HOTPLUG_PCI_SHPC is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_HWMON=y
CONFIG_HWSPINLOCK=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_ROCKCHIP=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_RK3X=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INDIRECT_PIO=y
CONFIG_INPUT=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_FF_MEMLESS=y
CONFIG_INPUT_KEYBOARD=y
CONFIG_INPUT_LEDS=y
CONFIG_INPUT_MATRIXKMAP=y
# CONFIG_INPUT_MISC is not set
# CONFIG_IOMMUFD is not set
CONFIG_IOMMU_API=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_IOMMU_DMA=y
CONFIG_IOMMU_IOVA=y
CONFIG_IOMMU_IO_PGTABLE=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_DART is not set
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
CONFIG_IOMMU_SUPPORT=y
# CONFIG_IO_STRICT_DEVMEM is not set
CONFIG_IO_URING=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MSI_IOMMU=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_JFFS2_ZLIB=y
CONFIG_JUMP_LABEL=y
CONFIG_KALLSYMS=y
CONFIG_KEXEC_CORE=y
CONFIG_KEXEC_FILE=y
CONFIG_KSM=y
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
CONFIG_LEDS_SYSCON=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=16
CONFIG_LIBCRC32C=y
CONFIG_LIBFDT=y
CONFIG_LOCALVERSION_AUTO=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_BUS_MUX=y
CONFIG_MDIO_BUS_MUX_GPIO=y
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_MFD_CORE=y
# CONFIG_MFD_KHADAS_MCU is not set
CONFIG_MFD_RK8XX=y
CONFIG_MFD_RK8XX_I2C=y
CONFIG_MFD_RK8XX_SPI=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_CQHCI=y
CONFIG_MMC_DW=y
# CONFIG_MMC_DW_BLUEFIELD is not set
# CONFIG_MMC_DW_EXYNOS is not set
# CONFIG_MMC_DW_HI3798CV200 is not set
# CONFIG_MMC_DW_K3 is not set
# CONFIG_MMC_DW_PCI is not set
CONFIG_MMC_DW_PLTFM=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_SDHCI_OF_DWCMSHC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MOTORCOMM_PHY=y
CONFIG_MQ_IOSCHED_DEADLINE=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_FLAGS=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=256
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_ROCKCHIP_EFUSE=y
CONFIG_NVMEM_ROCKCHIP_OTP=y
CONFIG_NVMEM_SYSFS=y
CONFIG_NVME_CORE=y
# CONFIG_NVME_HWMON is not set
# CONFIG_NVME_MULTIPATH is not set
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_OLD_SIGSUSPEND3=y
# CONFIG_OVERLAY_FS_XINO_AUTO is not set
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_PME=y
CONFIG_PCIE_ROCKCHIP=y
CONFIG_PCIE_ROCKCHIP_DW_HOST=y
CONFIG_PCIE_ROCKCHIP_HOST=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_STUB=y
CONFIG_PCS_XPCS=y
CONFIG_PER_VMA_LOCK=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PHY_ROCKCHIP_DP=y
# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
CONFIG_PHY_ROCKCHIP_EMMC=y
# CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY is not set
# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y
CONFIG_PHY_ROCKCHIP_PCIE=y
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_ROCKCHIP_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_RK805=y
CONFIG_PINCTRL_ROCKCHIP=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PL330_DMA=y
CONFIG_PLATFORM_MHU=y
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_OPP=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_SUPPLY=y
CONFIG_POWER_SUPPLY_HWMON=y
CONFIG_PREEMPT=y
CONFIG_PREEMPTION=y
CONFIG_PREEMPT_BUILD=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_PROC_VMCORE=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_PWM_SYSFS=y
# CONFIG_QFMT_V2 is not set
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_QUOTA=y
CONFIG_QUOTACTL=y
CONFIG_RAID_ATTRS=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_RCU_TRACE=y
CONFIG_REALTEK_PHY=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_IRQ=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_ARM_SCMI is not set
CONFIG_REGULATOR_FAN53555=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK808=y
CONFIG_RELOCATABLE=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_SCMI=y
CONFIG_RFS_ACCEL=y
CONFIG_ROCKCHIP_ERRATUM_3588001=y
CONFIG_ROCKCHIP_GRF=y
CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_ROCKCHIP_MBOX=y
CONFIG_ROCKCHIP_PHY=y
CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ROCKCHIP_THERMAL=y
CONFIG_ROCKCHIP_TIMER=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RPS=y
CONFIG_RSEQ=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RK808=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_NVMEM=y
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCHED_MC=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_PROC_FS is not set
CONFIG_SCSI_SAS_ATTRS=y
CONFIG_SCSI_SAS_HOST_SMP=y
CONFIG_SCSI_SAS_LIBSAS=y
# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SENSORS_ARM_SCMI is not set
CONFIG_SENSORS_ARM_SCPI=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_PCILIB=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIO=y
CONFIG_SERIO_AMBAKMI=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SG_POOL=y
CONFIG_SLUB_DEBUG=y
CONFIG_SMP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_DYNAMIC=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_ROCKCHIP=y
CONFIG_SPI_ROCKCHIP_SFC=y
CONFIG_SPI_SPIDEV=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FILE_CACHE=y
# CONFIG_SQUASHFS_FILE_DIRECT is not set
CONFIG_SRAM=y
CONFIG_STACKDEPOT=y
CONFIG_STACKPROTECTOR=y
CONFIG_STACKPROTECTOR_PER_TASK=y
CONFIG_STACKPROTECTOR_STRONG=y
CONFIG_STACKTRACE=y
# CONFIG_STAGING is not set
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
CONFIG_STRICT_DEVMEM=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_SWAP is not set
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYNC_FILE=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYSFS_SYSCALL=y
CONFIG_SYSVIPC_COMPAT=y
# CONFIG_TEXTSEARCH is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_EMULATION=y
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TRACE_CLOCK=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
CONFIG_TRANS_TABLE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_TYPEC=y
# CONFIG_TYPEC_ANX7411 is not set
CONFIG_TYPEC_FUSB302=y
# CONFIG_TYPEC_HD3SS3220 is not set
# CONFIG_TYPEC_MUX_FSA4480 is not set
# CONFIG_TYPEC_MUX_GPIO_SBU is not set
# CONFIG_TYPEC_MUX_NB7VPQ904M is not set
# CONFIG_TYPEC_MUX_PI3USB30532 is not set
# CONFIG_TYPEC_RT1719 is not set
# CONFIG_TYPEC_STUSB160X is not set
# CONFIG_TYPEC_TCPCI is not set
CONFIG_TYPEC_TCPM=y
# CONFIG_TYPEC_TPS6598X is not set
# CONFIG_TYPEC_WUSB3801 is not set
# CONFIG_UACCE is not set
# CONFIG_UCLAMP_TASK is not set
# CONFIG_UEVENT_HELPER is not set
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_HOST=y
CONFIG_USB_DWC3_OF_SIMPLE=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
CONFIG_USB_HID=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_PHY=y
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_ULPI_BUS=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PLATFORM=y
# CONFIG_VIRTIO_MENU is not set
CONFIG_VMAP_STACK=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XARRAY_MULTI=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
lede/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-photonicat.dts
+2 -2
View File
@@ -44,8 +44,8 @@
modem-rfkill {
compatible = "rfkill-gpio";
name = "modem-rfkill";
type = "wwan";
label = "modem-rfkill";
radio-type = "wwan";
reset-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
shutdown-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
};
lede/target/linux/rockchip/image/Makefile
+1 -1
View File
@@ -73,7 +73,7 @@ define Device/Default
DEVICE_DTS = rockchip/$$(SOC)-$(lastword $(subst _, ,$(1)))
endef
ifdef CONFIG_LINUX_6_1
ifndef CONFIG_LINUX_5_15
DTS_CPPFLAGS += -DDTS_NO_LEGACY
endif
lede/target/linux/rockchip/patches-6.1/019-v6.3-mmc-sdhci-of-dwcmshc-Update-DLL-and-pre.patch → lede/target/linux/rockchip/patches-6.1/007-v6.3-mmc-sdhci-of-dwcmshc-Update-DLL-and-pre.patch
View File
lede/target/linux/rockchip/patches-6.1/020-v6.4-mmc-sdhci-of-dwcmshc-properly-determine.patch → lede/target/linux/rockchip/patches-6.1/008-v6.4-mmc-sdhci-of-dwcmshc-properly-determine.patch
View File
lede/target/linux/rockchip/patches-6.1/011-v6.3-net-rfkill-gpio-add-DT-support.patch
+66
View File
@@ -0,0 +1,66 @@
From d64c732dfc9edcd57feb693c23162117737e426b Mon Sep 17 00:00:00 2001
From: Philipp Zabel <p.zabel@pengutronix.de>
Date: Mon, 2 Jan 2023 18:29:34 +0100
Subject: [PATCH] net: rfkill: gpio: add DT support
Allow probing rfkill-gpio via device tree. This hooks up the already
existing support that was started in commit 262c91ee5e52 ("net:
rfkill: gpio: prepare for DT and ACPI support") via the "rfkill-gpio"
compatible, with the "name" and "type" properties renamed to "label"
and "radio-type", respectively, in the device tree case.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20230102-rfkill-gpio-dt-v2-2-d1b83758c16d@pengutronix.de
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
net/rfkill/rfkill-gpio.c | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
--- a/net/rfkill/rfkill-gpio.c
+++ b/net/rfkill/rfkill-gpio.c
@@ -75,6 +75,8 @@ static int rfkill_gpio_probe(struct platform_device *pdev)
{
struct rfkill_gpio_data *rfkill;
struct gpio_desc *gpio;
+ const char *name_property;
+ const char *type_property;
const char *type_name;
int ret;
@@ -82,8 +84,15 @@ static int rfkill_gpio_probe(struct platform_device *pdev)
if (!rfkill)
return -ENOMEM;
- device_property_read_string(&pdev->dev, "name", &rfkill->name);
- device_property_read_string(&pdev->dev, "type", &type_name);
+ if (dev_of_node(&pdev->dev)) {
+ name_property = "label";
+ type_property = "radio-type";
+ } else {
+ name_property = "name";
+ type_property = "type";
+ }
+ device_property_read_string(&pdev->dev, name_property, &rfkill->name);
+ device_property_read_string(&pdev->dev, type_property, &type_name);
if (!rfkill->name)
rfkill->name = dev_name(&pdev->dev);
@@ -157,12 +166,19 @@ static const struct acpi_device_id rfkill_acpi_match[] = {
MODULE_DEVICE_TABLE(acpi, rfkill_acpi_match);
#endif
+static const struct of_device_id rfkill_of_match[] __maybe_unused = {
+ { .compatible = "rfkill-gpio", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, rfkill_of_match);
+
static struct platform_driver rfkill_gpio_driver = {
.probe = rfkill_gpio_probe,
.remove = rfkill_gpio_remove,
.driver = {
.name = "rfkill_gpio",
.acpi_match_table = ACPI_PTR(rfkill_acpi_match),
+ .of_match_table = of_match_ptr(rfkill_of_match),
},
};
lede/target/linux/rockchip/patches-6.1/012-v6.4-net-rfkill-gpio-Add-explicit-include-for-of.h.patch
+29
View File
@@ -0,0 +1,29 @@
From 75c7124ef3bafe0e9d1801d6449196dc3105df24 Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Wed, 5 Apr 2023 15:27:17 -0500
Subject: [PATCH] net: rfkill-gpio: Add explicit include for of.h
With linux/acpi.h no longer implicitly including of.h, add an explicit
include of of.h to fix the following error:
net/rfkill/rfkill-gpio.c:181:21: error: implicit declaration of function 'of_match_ptr' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
Acked-by: Johannes Berg <johannes@sipsolutions.net>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
net/rfkill/rfkill-gpio.c | 1 +
1 file changed, 1 insertion(+)
--- a/net/rfkill/rfkill-gpio.c
+++ b/net/rfkill/rfkill-gpio.c
@@ -8,6 +8,7 @@
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/rfkill.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/slab.h>
lede/target/linux/rockchip/patches-6.1/114-rfkill-gpio-add-of_match_table-support.patch
-34
View File
@@ -1,34 +0,0 @@
From b4aeb93e697e4dbe2d336d01290e92e98acfd83c Mon Sep 17 00:00:00 2001
From: jensen <jensenhuang@friendlyarm.com>
Date: Sat, 15 Oct 2022 18:47:24 +0800
Subject: [PATCH] rfkill: gpio: add of_match_table support
Signed-off-by: jensen <jensenhuang@friendlyarm.com>
---
net/rfkill/rfkill-gpio.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/net/rfkill/rfkill-gpio.c
+++ b/net/rfkill/rfkill-gpio.c
@@ -164,6 +164,13 @@ static const struct acpi_device_id rfkil
};
MODULE_DEVICE_TABLE(acpi, rfkill_acpi_match);
#endif
+#ifdef CONFIG_OF
+static struct of_device_id rfkill_gpio_of_match[] = {
+ { .compatible = "rfkill-gpio" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, rfkill_gpio_of_match);
+#endif
static struct platform_driver rfkill_gpio_driver = {
.probe = rfkill_gpio_probe,
@@ -171,6 +178,7 @@ static struct platform_driver rfkill_gpi
.driver = {
.name = "rfkill_gpio",
.acpi_match_table = ACPI_PTR(rfkill_acpi_match),
+ .of_match_table = of_match_ptr(rfkill_gpio_of_match),
},
};
lede/target/linux/rockchip/patches-6.6/005-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch
+31
View File
@@ -0,0 +1,31 @@
From af20b3384e8723077cc6484160b0cf4e9be321de Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@gmail.com>
Date: Mon, 7 Jun 2021 15:45:37 +0800
Subject: [PATCH] arm64: dts: rockchip: add EEPROM node for NanoPi R4S
NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which
stores the MAC address.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -68,6 +68,15 @@
status = "disabled";
};
+&i2c2 {
+ eeprom@51 {
+ compatible = "microchip,24c02", "atmel,24c02";
+ reg = <0x51>;
+ pagesize = <16>;
+ read-only; /* This holds our MAC */
+ };
+};
+
&i2c4 {
status = "disabled";
};
lede/target/linux/rockchip/patches-6.6/101-net-realtek-r8169-add-LED-configuration-from-OF.patch
+58
View File
@@ -0,0 +1,58 @@
From edcc2833819f6750bf003b95a6ac856aced26274 Mon Sep 17 00:00:00 2001
From: AnYun <amadeus@jmu.edu.cn>
Date: Sat, 18 Mar 2023 23:05:16 +0800
Subject: [PATCH] r8169: add LED configuration from OF
---
drivers/net/ethernet/realtek/r8169_main.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -17,6 +17,7 @@
#include <linux/delay.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
+#include <linux/of.h>
#include <linux/if_vlan.h>
#include <linux/in.h>
#include <linux/io.h>
@@ -174,6 +175,7 @@ enum rtl_registers {
MAR0 = 8, /* Multicast filter. */
CounterAddrLow = 0x10,
CounterAddrHigh = 0x14,
+ CustomLED = 0x18,
TxDescStartAddrLow = 0x20,
TxDescStartAddrHigh = 0x24,
TxHDescStartAddrLow = 0x28,
@@ -5202,6 +5204,22 @@ static bool rtl_aspm_is_safe(struct rtl8
return false;
}
+static int rtl_led_configuration(struct rtl8169_private *tp)
+{
+ u32 led_data;
+ int ret;
+
+ ret = of_property_read_u32(tp->pci_dev->dev.of_node,
+ "realtek,led-data", &led_data);
+
+ if (ret)
+ return ret;
+
+ RTL_W16(tp, CustomLED, led_data);
+
+ return 0;
+}
+
static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct rtl8169_private *tp;
@@ -5373,6 +5391,7 @@ static int rtl_init_one(struct pci_dev *
if (!tp->counters)
return -ENOMEM;
+ rtl_led_configuration(tp);
pci_set_drvdata(pdev, tp);
rc = r8169_mdio_register(tp);
lede/target/linux/rockchip/patches-6.6/102-net-phy-realtek-RTL8211-add-LED-configuration-from-OF.patch
+44
View File
@@ -0,0 +1,44 @@
From edcc2833819f6750bf003b95a6ac856aced26276 Mon Sep 17 00:00:00 2001
From: AnYun <amadeus@jmu.edu.cn>
Date: Mon, 3 Apr 2023 23:26:04 +0800
Subject: [PATCH] net: phy: realtek: add LED configuration from OF for 8211f
---
drivers/net/phy/realtek.c | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -28,6 +28,8 @@
#define RTL821x_EXT_PAGE_SELECT 0x1e
#define RTL821x_PAGE_SELECT 0x1f
+#define RTL8211F_LCR 0x10
+#define RTL8211F_EEELCR 0x11
#define RTL8211F_PHYCR1 0x18
#define RTL8211F_PHYCR2 0x19
#define RTL8211F_INSR 0x1d
@@ -357,6 +359,7 @@ static int rtl8211f_config_init(struct p
struct rtl821x_priv *priv = phydev->priv;
struct device *dev = &phydev->mdio.dev;
u16 val_txdly, val_rxdly;
+ u32 led_data;
int ret;
ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
@@ -423,6 +426,15 @@ static int rtl8211f_config_init(struct p
val_rxdly ? "enabled" : "disabled");
}
+ ret = of_property_read_u32(dev->of_node,
+ "realtek,led-data", &led_data);
+ if (!ret) {
+ phy_write(phydev, RTL821x_PAGE_SELECT, 0xd04);
+ phy_write(phydev, RTL8211F_LCR, led_data);
+ phy_write(phydev, RTL8211F_EEELCR, 0x0);
+ phy_write(phydev, RTL821x_PAGE_SELECT, 0x0);
+ }
+
if (priv->has_phycr2) {
ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
RTL8211F_CLKOUT_EN, priv->phycr2);
lede/target/linux/rockchip/patches-6.6/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch
+24
View File
@@ -0,0 +1,24 @@
From 2795c8b31a686bdb8338f9404d18ef7a154f0d75 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sun, 26 Jul 2020 13:32:59 +0200
Subject: [PATCH] arm64: rockchip: add OF node for USB eth on NanoPi R2S
This adds the OF node for the USB3 ethernet adapter on the FriendlyARM
NanoPi R2S. Add the correct value for the RTL8153 LED configuration
register to match the blink behavior of the other port on the device.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 7 +++++++
1 file changed, 1 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -397,6 +397,7 @@
rtl8153: device@2 {
compatible = "usbbda,8153";
reg = <2>;
+ realtek,led-data = <0x87>;
};
};
lede/target/linux/rockchip/patches-6.6/105-nanopi-r4s-sd-signalling.patch
+26
View File
@@ -0,0 +1,26 @@
From: David Bauer <mail@david-bauer.net>
Subject: arm64: dts: rockchip: disable UHS modes for NanoPi R4S
The NanoPi R4S leaves the SD card in 1.8V signalling when rebooting
while U-Boot requires the card to be in 3.3V mode.
Remove UHS support from the SD controller so the card remains in 3.3V
mode. This reduces transfer speeds but ensures a reboot whether from
userspace or following a kernel panic is always working.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -121,6 +121,11 @@
status = "disabled";
};
+&sdmmc {
+ /delete-property/ sd-uhs-sdr104;
+ cap-sd-highspeed;
+};
+
&u2phy0_host {
phy-supply = <&vdd_5v>;
};
lede/target/linux/rockchip/patches-6.6/106-rockchip-rock-pi-4.patch
+35
View File
@@ -0,0 +1,35 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -38,6 +38,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gr
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-dumo.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-inx.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-scarlet-kd.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-guangmiao-g4c.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4se.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-hugsun-x99.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
@@ -59,6 +61,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-4c-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-4se.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
+ * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
+ */
+
+/dts-v1/;
+#include "rk3399-rock-pi-4.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi 4";
+ compatible = "radxa,rockpi4", "rockchip,rk3399";
+};
lede/target/linux/rockchip/patches-6.6/107-mmc-core-set-initial-signal-voltage-on-power-off.patch
+35
View File
@@ -0,0 +1,35 @@
From 0d329112c709d6cfedf0fffb19f0cc6b19043f6b Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Wed, 20 Feb 2019 07:38:34 +0000
Subject: [PATCH] mmc: core: set initial signal voltage on power off
Some boards have SD card connectors where the power rail cannot be switched
off by the driver. If the card has not been power cycled, it may still be
using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling
will fail to boot from a UHS card that continue to use 1.8V signaling.
Set initial signal voltage in mmc_power_off() to allow re-boot to function.
This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288),
same issue have been seen on some Rockchip RK3399 boards.
I am sending this as a RFC because I have no insights into SD/MMC subsystem,
this change fix a re-boot issue on my boards and does not break emmc/sdio.
Is this an acceptable workaround? Any advice is appreciated.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
drivers/mmc/core/core.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1370,6 +1370,8 @@ void mmc_power_off(struct mmc_host *host
mmc_pwrseq_power_off(host);
+ mmc_set_initial_signal_voltage(host);
+
host->ios.clock = 0;
host->ios.vdd = 0;
lede/target/linux/rockchip/patches-6.6/110-arm64-rk3568-update-gicv3-its-and-pci-msi-map.patch
+77
View File
@@ -0,0 +1,77 @@
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -64,7 +64,7 @@
compatible = "rockchip,rk3568-pcie";
#address-cells = <3>;
#size-cells = <2>;
- bus-range = <0x0 0xf>;
+ bus-range = <0x10 0x1f>;
clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
<&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,
<&cru CLK_PCIE30X1_AUX_NDFT>;
@@ -87,7 +87,7 @@
num-ib-windows = <6>;
num-ob-windows = <2>;
max-link-speed = <3>;
- msi-map = <0x0 &gic 0x1000 0x1000>;
+ msi-map = <0x1000 &its 0x1000 0x1000>;
num-lanes = <1>;
phys = <&pcie30phy>;
phy-names = "pcie-phy";
@@ -117,7 +117,7 @@
compatible = "rockchip,rk3568-pcie";
#address-cells = <3>;
#size-cells = <2>;
- bus-range = <0x0 0xf>;
+ bus-range = <0x20 0x2f>;
clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
<&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
<&cru CLK_PCIE30X2_AUX_NDFT>;
@@ -140,7 +140,7 @@
num-ib-windows = <6>;
num-ob-windows = <2>;
max-link-speed = <3>;
- msi-map = <0x0 &gic 0x2000 0x1000>;
+ msi-map = <0x2000 &its 0x2000 0x1000>;
num-lanes = <2>;
phys = <&pcie30phy>;
phy-names = "pcie-phy";
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -315,14 +315,21 @@
gic: interrupt-controller@fd400000 {
compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ interrupt-controller;
+
reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
- <0x0 0xfd460000 0 0x80000>; /* GICR */
+ <0x0 0xfd460000 0 0xc0000>; /* GICR */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <3>;
- mbi-alias = <0x0 0xfd410000>;
- mbi-ranges = <296 24>;
- msi-controller;
+ its: interrupt-controller@fd440000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ #msi-cells = <1>;
+ reg = <0x0 0xfd440000 0x0 0x20000>;
+ };
};
usb_host0_ehci: usb@fd800000 {
@@ -988,7 +995,7 @@
num-ib-windows = <6>;
num-ob-windows = <2>;
max-link-speed = <2>;
- msi-map = <0x0 &gic 0x0 0x1000>;
+ msi-map = <0x0 &its 0x0 0x1000>;
num-lanes = <1>;
phys = <&combphy2 PHY_TYPE_PCIE>;
phy-names = "pcie-phy";
lede/target/linux/rockchip/patches-6.6/111-irqchip-gic-v3-add-hackaround-for-rk3568-its.patch
+31
View File
@@ -0,0 +1,31 @@
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -4757,11 +4757,13 @@ static bool __maybe_unused its_enable_qu
return true;
}
-static bool __maybe_unused its_enable_rk3588001(void *data)
+static bool __maybe_unused its_enable_rk35xx(void *data)
{
struct its_node *its = data;
- if (!of_machine_is_compatible("rockchip,rk3588") &&
+ if (!of_machine_is_compatible("rockchip,rk3566") &&
+ !of_machine_is_compatible("rockchip,rk3568") &&
+ !of_machine_is_compatible("rockchip,rk3588") &&
!of_machine_is_compatible("rockchip,rk3588s"))
return false;
@@ -4827,10 +4829,10 @@ static const struct gic_quirk its_quirks
#endif
#ifdef CONFIG_ROCKCHIP_ERRATUM_3588001
{
- .desc = "ITS: Rockchip erratum RK3588001",
+ .desc = "ITS: Rockchip erratum RK35XX",
.iidr = 0x0201743b,
.mask = 0xffffffff,
- .init = its_enable_rk3588001,
+ .init = its_enable_rk35xx,
},
#endif
{
lede/target/linux/rockchip/patches-6.6/112-arm64-dts-rockchip-rk3568-Add-xpcs-support.patch
+33
View File
@@ -0,0 +1,33 @@
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -175,11 +175,13 @@
clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
<&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
<&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
- <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>;
+ <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>,
+ <&cru PCLK_XPCS>;
clock-names = "stmmaceth", "mac_clk_rx",
"mac_clk_tx", "clk_mac_refout",
"aclk_mac", "pclk_mac",
- "clk_mac_speed", "ptp_ref";
+ "clk_mac_speed", "ptp_ref",
+ "pclk_xpcs";
resets = <&cru SRST_A_GMAC0>;
reset-names = "stmmaceth";
rockchip,grf = <&grf>;
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -376,6 +376,12 @@
status = "disabled";
};
+ xpcs: syscon@fda00000 {
+ compatible = "rockchip,rk3568-xpcs", "syscon";
+ reg = <0x0 0xfda00000 0x0 0x200000>;
+ status = "disabled";
+ };
+
pmugrf: syscon@fdc20000 {
compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfdc20000 0x0 0x10000>;
lede/target/linux/rockchip/patches-6.6/113-ethernet-stmicro-stmmac-Add-SGMII-QSGMII-support.patch
+320
View File
@@ -0,0 +1,320 @@
From ca89ea7e0760c096c6fd807d321ecb8416f8cd9d Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Thu, 31 Dec 2020 18:32:03 +0800
Subject: [PATCH] ethernet: stmicro: stmmac: Add SGMII/QSGMII support for
RK3568
After the completion of Clause 37 auto-negotiation, xpcs automatically
switches to the negotiated speed for 10/100/1000M.
Change-Id: Iab9dd6ee61a35bf89fd3a0721f5d398de501a7ec
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-rk.c | 228 +++++++++++++++++-
1 file changed, 217 insertions(+), 11 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -11,6 +11,7 @@
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/phy.h>
+#include <linux/phy/phy.h>
#include <linux/of_net.h>
#include <linux/gpio.h>
#include <linux/module.h>
@@ -30,6 +31,8 @@ struct rk_gmac_ops {
void (*set_to_rgmii)(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay);
void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
+ void (*set_to_sgmii)(struct rk_priv_data *bsp_priv);
+ void (*set_to_qsgmii)(struct rk_priv_data *bsp_priv);
void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input,
@@ -40,7 +43,7 @@ struct rk_gmac_ops {
};
static const char * const rk_clocks[] = {
- "aclk_mac", "pclk_mac", "mac_clk_tx", "clk_mac_speed",
+ "aclk_mac", "pclk_mac", "pclk_xpcs", "mac_clk_tx", "clk_mac_speed",
};
static const char * const rk_rmii_clocks[] = {
@@ -50,6 +53,7 @@ static const char * const rk_rmii_clocks
enum rk_clocks_index {
RK_ACLK_MAC = 0,
RK_PCLK_MAC,
+ RK_PCLK_XPCS,
RK_MAC_CLK_TX,
RK_CLK_MAC_SPEED,
RK_MAC_CLK_RX,
@@ -81,6 +85,7 @@ struct rk_priv_data {
struct regmap *grf;
struct regmap *php_grf;
+ struct regmap *xpcs;
};
#define HIWORD_UPDATE(val, mask, shift) \
@@ -93,6 +98,128 @@ struct rk_priv_data {
(((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \
((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE))
+/* XPCS */
+#define XPCS_APB_INCREMENT (0x4)
+#define XPCS_APB_MASK GENMASK_ULL(20, 0)
+
+#define SR_MII_BASE (0x1F0000)
+#define SR_MII1_BASE (0x1A0000)
+
+#define VR_MII_DIG_CTRL1 (0x8000)
+#define VR_MII_AN_CTRL (0x8001)
+#define VR_MII_AN_INTR_STS (0x8002)
+#define VR_MII_LINK_TIMER_CTRL (0x800A)
+
+#define SR_MII_CTRL_AN_ENABLE \
+ (BMCR_ANENABLE | BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000)
+#define MII_MAC_AUTO_SW (0x0200)
+#define PCS_MODE_OFFSET (0x1)
+#define MII_AN_INTR_EN (0x1)
+#define PCS_SGMII_MODE (0x2 << PCS_MODE_OFFSET)
+#define PCS_QSGMII_MODE (0X3 << PCS_MODE_OFFSET)
+#define VR_MII_CTRL_SGMII_AN_EN (PCS_SGMII_MODE | MII_AN_INTR_EN)
+#define VR_MII_CTRL_QSGMII_AN_EN (PCS_QSGMII_MODE | MII_AN_INTR_EN)
+
+#define SR_MII_OFFSET(_x) ({ \
+ typeof(_x) (x) = (_x); \
+ (((x) == 0) ? SR_MII_BASE : (SR_MII1_BASE + ((x) - 1) * 0x10000)); \
+}) \
+
+static int xpcs_read(void *priv, int reg)
+{
+ struct rk_priv_data *bsp_priv = (struct rk_priv_data *)priv;
+ int ret, val;
+
+ ret = regmap_read(bsp_priv->xpcs,
+ (u32)(reg * XPCS_APB_INCREMENT) & XPCS_APB_MASK,
+ &val);
+ if (ret)
+ return ret;
+
+ return val;
+}
+
+static int xpcs_write(void *priv, int reg, u16 value)
+{
+ struct rk_priv_data *bsp_priv = (struct rk_priv_data *)priv;
+
+ return regmap_write(bsp_priv->xpcs,
+ (reg * XPCS_APB_INCREMENT) & XPCS_APB_MASK, value);
+}
+
+static int xpcs_poll_reset(struct rk_priv_data *bsp_priv, int dev)
+{
+ /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
+ unsigned int retries = 12;
+ int ret;
+
+ do {
+ msleep(50);
+ ret = xpcs_read(bsp_priv, SR_MII_OFFSET(dev) + MDIO_CTRL1);
+ if (ret < 0)
+ return ret;
+ } while (ret & MDIO_CTRL1_RESET && --retries);
+
+ return (ret & MDIO_CTRL1_RESET) ? -ETIMEDOUT : 0;
+}
+
+static int xpcs_soft_reset(struct rk_priv_data *bsp_priv, int dev)
+{
+ int ret;
+
+ ret = xpcs_write(bsp_priv, SR_MII_OFFSET(dev) + MDIO_CTRL1,
+ MDIO_CTRL1_RESET);
+ if (ret < 0)
+ return ret;
+
+ return xpcs_poll_reset(bsp_priv, dev);
+}
+
+static int xpcs_setup(struct rk_priv_data *bsp_priv, int mode)
+{
+ int ret, i, idx = bsp_priv->id;
+ u32 val;
+
+ if (mode == PHY_INTERFACE_MODE_QSGMII && idx > 0)
+ return 0;
+
+ ret = xpcs_soft_reset(bsp_priv, idx);
+ if (ret) {
+ dev_err(&bsp_priv->pdev->dev, "xpcs_soft_reset fail %d\n", ret);
+ return ret;
+ }
+
+ xpcs_write(bsp_priv, SR_MII_OFFSET(0) + VR_MII_AN_INTR_STS, 0x0);
+ xpcs_write(bsp_priv, SR_MII_OFFSET(0) + VR_MII_LINK_TIMER_CTRL, 0x1);
+
+ if (mode == PHY_INTERFACE_MODE_SGMII)
+ xpcs_write(bsp_priv, SR_MII_OFFSET(0) + VR_MII_AN_CTRL,
+ VR_MII_CTRL_SGMII_AN_EN);
+ else
+ xpcs_write(bsp_priv, SR_MII_OFFSET(0) + VR_MII_AN_CTRL,
+ VR_MII_CTRL_QSGMII_AN_EN);
+
+ if (mode == PHY_INTERFACE_MODE_QSGMII) {
+ for (i = 0; i < 4; i++) {
+ val = xpcs_read(bsp_priv,
+ SR_MII_OFFSET(i) + VR_MII_DIG_CTRL1);
+ xpcs_write(bsp_priv,
+ SR_MII_OFFSET(i) + VR_MII_DIG_CTRL1,
+ val | MII_MAC_AUTO_SW);
+ xpcs_write(bsp_priv, SR_MII_OFFSET(i) + MII_BMCR,
+ SR_MII_CTRL_AN_ENABLE);
+ }
+ } else {
+ val = xpcs_read(bsp_priv, SR_MII_OFFSET(idx) + VR_MII_DIG_CTRL1);
+ xpcs_write(bsp_priv, SR_MII_OFFSET(idx) + VR_MII_DIG_CTRL1,
+ val | MII_MAC_AUTO_SW);
+ xpcs_write(bsp_priv, SR_MII_OFFSET(idx) + MII_BMCR,
+ SR_MII_CTRL_AN_ENABLE);
+ }
+
+ return ret;
+}
+
#define PX30_GRF_GMAC_CON1 0x0904
/* PX30_GRF_GMAC_CON1 */
@@ -1021,6 +1148,7 @@ static const struct rk_gmac_ops rk3399_o
#define RK3568_GRF_GMAC1_CON1 0x038c
/* RK3568_GRF_GMAC0_CON1 && RK3568_GRF_GMAC1_CON1 */
+#define RK3568_GMAC_GMII_MODE GRF_BIT(7)
#define RK3568_GMAC_PHY_INTF_SEL_RGMII \
(GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6))
#define RK3568_GMAC_PHY_INTF_SEL_RMII \
@@ -1036,6 +1164,46 @@ static const struct rk_gmac_ops rk3399_o
#define RK3568_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8)
#define RK3568_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)
+#define RK3568_PIPE_GRF_XPCS_CON0 0X0040
+
+#define RK3568_PIPE_GRF_XPCS_QGMII_MAC_SEL GRF_BIT(0)
+#define RK3568_PIPE_GRF_XPCS_SGMII_MAC_SEL GRF_BIT(1)
+#define RK3568_PIPE_GRF_XPCS_PHY_READY GRF_BIT(2)
+
+static void rk3568_set_to_sgmii(struct rk_priv_data *bsp_priv)
+{
+ struct device *dev = &bsp_priv->pdev->dev;
+ u32 con1;
+
+ if (IS_ERR(bsp_priv->grf)) {
+ dev_err(dev, "Missing rockchip,grf property\n");
+ return;
+ }
+
+ con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 :
+ RK3568_GRF_GMAC0_CON1;
+ regmap_write(bsp_priv->grf, con1, RK3568_GMAC_GMII_MODE);
+
+ xpcs_setup(bsp_priv, PHY_INTERFACE_MODE_SGMII);
+}
+
+static void rk3568_set_to_qsgmii(struct rk_priv_data *bsp_priv)
+{
+ struct device *dev = &bsp_priv->pdev->dev;
+ u32 con1;
+
+ if (IS_ERR(bsp_priv->grf)) {
+ dev_err(dev, "Missing rockchip,grf property\n");
+ return;
+ }
+
+ con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 :
+ RK3568_GRF_GMAC0_CON1;
+ regmap_write(bsp_priv->grf, con1, RK3568_GMAC_GMII_MODE);
+
+ xpcs_setup(bsp_priv, PHY_INTERFACE_MODE_QSGMII);
+}
+
static void rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv,
int tx_delay, int rx_delay)
{
@@ -1108,6 +1276,8 @@ static void rk3568_set_gmac_speed(struct
static const struct rk_gmac_ops rk3568_ops = {
.set_to_rgmii = rk3568_set_to_rgmii,
.set_to_rmii = rk3568_set_to_rmii,
+ .set_to_sgmii = rk3568_set_to_sgmii,
+ .set_to_qsgmii = rk3568_set_to_qsgmii,
.set_rgmii_speed = rk3568_set_gmac_speed,
.set_rmii_speed = rk3568_set_gmac_speed,
.regs_valid = true,
@@ -1580,7 +1750,7 @@ static int gmac_clk_enable(struct rk_pri
return 0;
}
-static int phy_power_on(struct rk_priv_data *bsp_priv, bool enable)
+static int rk_gmac_phy_power_on(struct rk_priv_data *bsp_priv, bool enable)
{
struct regulator *ldo = bsp_priv->regulator;
int ret;
@@ -1679,6 +1849,18 @@ static struct rk_priv_data *rk_gmac_setu
"rockchip,grf");
bsp_priv->php_grf = syscon_regmap_lookup_by_phandle(dev->of_node,
"rockchip,php-grf");
+ bsp_priv->xpcs = syscon_regmap_lookup_by_phandle(dev->of_node,
+ "rockchip,xpcs");
+ if (!IS_ERR(bsp_priv->xpcs)) {
+ struct phy *comphy;
+
+ comphy = devm_of_phy_get(&pdev->dev, dev->of_node, NULL);
+ if (IS_ERR(comphy))
+ dev_err(dev, "devm_of_phy_get error\n");
+ ret = phy_init(comphy);
+ if (ret)
+ dev_err(dev, "phy_init error\n");
+ }
if (plat->phy_node) {
bsp_priv->integrated_phy = of_property_read_bool(plat->phy_node,
@@ -1756,11 +1938,19 @@ static int rk_gmac_powerup(struct rk_pri
dev_info(dev, "init for RMII\n");
bsp_priv->ops->set_to_rmii(bsp_priv);
break;
+ case PHY_INTERFACE_MODE_SGMII:
+ dev_info(dev, "init for SGMII\n");
+ bsp_priv->ops->set_to_sgmii(bsp_priv);
+ break;
+ case PHY_INTERFACE_MODE_QSGMII:
+ dev_info(dev, "init for QSGMII\n");
+ bsp_priv->ops->set_to_qsgmii(bsp_priv);
+ break;
default:
dev_err(dev, "NO interface defined!\n");
}
- ret = phy_power_on(bsp_priv, true);
+ ret = rk_gmac_phy_power_on(bsp_priv, true);
if (ret) {
gmac_clk_enable(bsp_priv, false);
return ret;
@@ -1781,7 +1971,7 @@ static void rk_gmac_powerdown(struct rk_
pm_runtime_put_sync(&gmac->pdev->dev);
- phy_power_on(gmac, false);
+ rk_gmac_phy_power_on(gmac, false);
gmac_clk_enable(gmac, false);
}
@@ -1802,6 +1992,9 @@ static void rk_fix_speed(void *priv, uns
if (bsp_priv->ops->set_rmii_speed)
bsp_priv->ops->set_rmii_speed(bsp_priv, speed);
break;
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_QSGMII:
+ break;
default:
dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface);
}
lede/target/linux/rockchip/patches-6.6/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch
+22
View File
@@ -0,0 +1,22 @@
From 3b7eb946b1d640d684a921e53e1e50985ab7eb89 Mon Sep 17 00:00:00 2001
From: QiuSimons <45143996+QiuSimons@users.noreply.github.com>
Date: Tue, 4 Aug 2020 20:17:53 +0800
Subject: [PATCH] rockchip: rk3328: add i2c0 controller for nanopi r2s
---
arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 4 ++++
1 files changed, 4 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -166,6 +166,10 @@
};
};
+&i2c0 {
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
lede/target/linux/rockchip/patches-6.6/205-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch
+442
View File
@@ -0,0 +1,442 @@
From 0f989817a4c1d2c3d196d550ff05cda98bc91324 Mon Sep 17 00:00:00 2001
From: Julian Pidancet <julian@pidancet.net>
Date: Sun, 23 Jan 2022 16:34:08 +0100
Subject: [PATCH v2] rockchip: rk3328: add support for FriendlyARM NanoPi NEO3
This patch adds support for FriendlyARM NanoPi NEO3
Soc: RockChip RK3328
RAM: 1GB/2GB DDR4
LAN: 10/100/1000M Ethernet with unique MAC
USB Host: 1x USB3.0 Type A and 2x USB2.0 on 2.54mm pin header
MicroSD: x 1 for system boot and storage
LED: Power LED x 1, System LED x 1
Key: User Button x 1
Fan: 2 Pin JST ZH 1.5mm Connector for 5V Fan
GPIO: 26 pin-header, include I2C, UART, SPI, I2S, GPIO
Power: 5V/1A, via Type-C or GPIO
Signed-off-by: Julian Pidancet <julian@pidancet.net>
---
This is another shot at previous work submitted by Marty Jones
<mj8263788@gmail.com> (https://lore.kernel.org/linux-arm-kernel/20201228152836.02795e09.mj8263788@gmail.com/),
which is now a year old.
v2: Following up on Robin Murphy's comments, the NEO3 DTS is now
standalone and no longer includes the nanopi R2S one. The lan_led and
wan_len nodes have been removed, and the sys_led node has been renamed
to status_led in accordance with the board schematics.
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3328-nanopi-neo3.dts | 396 ++++++++++++++++++
2 files changed, 397 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-neo3.dts
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-ev
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-lts.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-neo3.dts
@@ -0,0 +1,394 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
+ * Copyright (c) 2022 Julian Pidancet <julian@pidancet.net>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "rk3328.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi NEO3";
+ compatible = "friendlyarm,nanopi-neo3", "rockchip,rk3328";
+
+ aliases {
+ led-boot = &status_led;
+ led-failsafe = &status_led;
+ led-running = &status_led;
+ led-upgrade = &status_led;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ gmac_clk: gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "gmac_clkin";
+ #clock-cells = <0>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&reset_button_pin>;
+ pinctrl-names = "default";
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <50>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&status_led_pin>;
+ pinctrl-names = "default";
+
+ status_led: led-0 {
+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+ label = "nanopi-neo3:green:status";
+ };
+ };
+
+ vcc_io_sdio: sdmmcio-regulator {
+ compatible = "regulator-gpio";
+ enable-active-high;
+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&sdio_vcc_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_io_sdio";
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-settling-time-us = <5000>;
+ regulator-type = "voltage";
+ startup-delay-us = <2000>;
+ states = <1800000 0x1>,
+ <3300000 0x0>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vcc_sd: sdmmc-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&sdmmc0m1_pin>;
+ pinctrl-names = "default";
+ regulator-name = "vcc_sd";
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_io_33>;
+ };
+
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_5v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc_rtl8153: vcc-rtl8153-regulator {
+ compatible = "regulator-fixed";
+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8153_en_drv>;
+ regulator-always-on;
+ regulator-name = "vcc_rtl8153";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+ cpu-supply = <&vdd_arm>;
+};
+
+&display_subsystem {
+ status = "disabled";
+};
+
+&gmac2io {
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
+ clock_in_out = "input";
+ phy-handle = <&rtl8211e>;
+ phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default";
+ rx_delay = <0x18>;
+ snps,aal;
+ tx_delay = <0x24>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211e: ethernet-phy@1 {
+ reg = <1>;
+ pinctrl-0 = <&eth_phy_reset_pin>;
+ pinctrl-names = "default";
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+
+ rk805: pmic@18 {
+ compatible = "rockchip,rk805";
+ reg = <0x18>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk805-clkout2";
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-0 = <&pmic_int_l>;
+ pinctrl-names = "default";
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vdd_5v>;
+ vcc2-supply = <&vdd_5v>;
+ vcc3-supply = <&vdd_5v>;
+ vcc4-supply = <&vdd_5v>;
+ vcc5-supply = <&vcc_io_33>;
+ vcc6-supply = <&vdd_5v>;
+
+ regulators {
+ vdd_log: DCDC_REG1 {
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+
+ vdd_arm: DCDC_REG2 {
+ regulator-name = "vdd_arm";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <950000>;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_io_33: DCDC_REG4 {
+ regulator-name = "vcc_io_33";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_18: LDO_REG1 {
+ regulator-name = "vcc_18";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc18_emmc: LDO_REG2 {
+ regulator-name = "vcc18_emmc";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-name = "vdd_10";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1000000>;
+ };
+ };
+ };
+ };
+};
+
+&io_domains {
+ pmuio-supply = <&vcc_io_33>;
+ vccio1-supply = <&vcc_io_33>;
+ vccio2-supply = <&vcc18_emmc>;
+ vccio3-supply = <&vcc_io_sdio>;
+ vccio4-supply = <&vcc_18>;
+ vccio5-supply = <&vcc_io_33>;
+ vccio6-supply = <&vcc_io_33>;
+ status = "okay";
+};
+
+&pinctrl {
+ button {
+ reset_button_pin: reset-button-pin {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ethernet-phy {
+ eth_phy_reset_pin: eth-phy-reset-pin {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ leds {
+ status_led_pin: status-led-pin {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sd {
+ sdio_vcc_pin: sdio-vcc-pin {
+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ rtl8153_en_drv: rtl8153-en-drv {
+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
+ pinctrl-names = "default";
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_sd>;
+ vqmmc-supply = <&vcc_io_sdio>;
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+ status = "okay";
+};
+
+&u2phy {
+ status = "okay";
+};
+
+&u2phy_host {
+ status = "okay";
+};
+
+&u2phy_otg {
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb20_otg {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb-eth@2 {
+ compatible = "realtek,rtl8153";
+ reg = <2>;
+
+ realtek,led-data = <0x87>;
+ };
+};
lede/target/linux/rockchip/patches-6.6/210-rockchip-rk356x-add-support-for-new-boards.patch
+30
View File
@@ -0,0 +1,30 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-an
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-panther-x2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb
@@ -98,9 +99,19 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lu
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h66k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h69k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-t68m.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-photonicat.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-seewo-sv21.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
lede/target/linux/rockchip/patches-6.6/211-rockchip-rk3399-add-support-more-devices.patch
+14
View File
@@ -0,0 +1,14 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -68,6 +68,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-king3399.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-h3399pc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-dlfr100.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mpc1903.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-xiaobao-nas-v1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
lede/target/linux/rockchip/patches-6.6/801-char-add-support-for-rockchip-hardware-random-number.patch
+45
View File
@@ -0,0 +1,45 @@
From e5b5361651940ff5c0c1784dfd0130abec7ab535 Mon Sep 17 00:00:00 2001
From: wevsty <ty@wevs.org>
Date: Mon, 24 Aug 2020 02:27:11 +0800
Subject: [PATCH] char: add support for rockchip hardware random number
generator
This patch provides hardware random number generator support for all rockchip SOC.
rockchip-rng.c from https://github.com/rockchip-linux/kernel/blob/develop-4.4/drivers/char/hw_random/rockchip-rng.c
Signed-off-by: wevsty <ty@wevs.org>
---
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -383,6 +383,19 @@ config HW_RANDOM_STM32
If unsure, say N.
+config HW_RANDOM_ROCKCHIP
+ tristate "Rockchip Random Number Generator support"
+ depends on ARCH_ROCKCHIP
+ default HW_RANDOM
+ help
+ This driver provides kernel-side support for the Random Number
+ Generator hardware found on Rockchip cpus.
+
+ To compile this driver as a module, choose M here: the
+ module will be called rockchip-rng.
+
+ If unsure, say Y.
+
config HW_RANDOM_PIC32
tristate "Microchip PIC32 Random Number Generator support"
depends on MACH_PIC32 || COMPILE_TEST
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) +=
obj-$(CONFIG_HW_RANDOM_ST) += st-rng.o
obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o
obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o
+obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o
obj-$(CONFIG_HW_RANDOM_PIC32) += pic32-rng.o
obj-$(CONFIG_HW_RANDOM_MESON) += meson-rng.o
obj-$(CONFIG_HW_RANDOM_CAVIUM) += cavium-rng.o cavium-rng-vf.o
lede/target/linux/rockchip/patches-6.6/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch
+69
View File
@@ -0,0 +1,69 @@
From e5b5361651940ff5c0c1784dfd0130abec7ab535 Mon Sep 17 00:00:00 2001
From: wevsty <ty@wevs.org>
Date: Mon, 24 Aug 2020 02:27:11 +0800
Subject: [PATCH] arm64: dts: rockchip: add hardware random number generator
for RK3328 and RK3399
Adding Hardware Random Number Generator Resources to the RK3328 and RK3399.
Signed-off-by: wevsty <ty@wevs.org>
---
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -281,6 +281,17 @@
status = "disabled";
};
+ rng: rng@ff060000 {
+ compatible = "rockchip,cryptov1-rng";
+ reg = <0x0 0xff060000 0x0 0x4000>;
+
+ clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO_SLV>;
+ clock-names = "clk_crypto", "hclk_crypto";
+ assigned-clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO_SLV>;
+ assigned-clock-rates = <150000000>, <100000000>;
+ status = "disabled";
+ };
+
grf: syscon@ff100000 {
compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
reg = <0x0 0xff100000 0x0 0x1000>;
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2106,6 +2106,16 @@
};
};
+ rng: rng@ff8b8000 {
+ compatible = "rockchip,cryptov1-rng";
+ reg = <0x0 0xff8b8000 0x0 0x1000>;
+ clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>;
+ clock-names = "clk_crypto", "hclk_crypto";
+ assigned-clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>;
+ assigned-clock-rates = <150000000>, <100000000>;
+ status = "okay";
+ };
+
gpu: gpu@ff9a0000 {
compatible = "rockchip,rk3399-mali", "arm,mali-t860";
reg = <0x0 0xff9a0000 0x0 0x10000>;
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -215,6 +215,16 @@
};
};
+ rng: rng@fe388000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x0 0xfe388000 0x0 0x2000>;
+ clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+ clock-names = "clk_trng", "hclk_trng";
+ resets = <&cru SRST_TRNG_NS>;
+ reset-names = "reset";
+ status = "disabled";
+ };
+
combphy0: phy@fe820000 {
compatible = "rockchip,rk3568-naneng-combphy";
reg = <0x0 0xfe820000 0x0 0x100>;
lede/target/linux/rockchip/patches-6.6/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch
+44
View File
@@ -0,0 +1,44 @@
From fcd9629c05f373771e85920e1c1d0ab252617878 Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Tue, 19 Nov 2019 13:53:25 +0800
Subject: [PATCH] PM / devfreq: rockchip: add devfreq driver for rk3328 dmc
Signed-off-by: hmz007 <hmz007@gmail.com>
---
drivers/devfreq/Kconfig | 18 +-
drivers/devfreq/Makefile | 1 +
drivers/devfreq/rk3328_dmc.c | 846 +++++++++++++++++++++++++++++++++++
3 files changed, 862 insertions(+), 3 deletions(-)
create mode 100644 drivers/devfreq/rk3328_dmc.c
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -129,6 +129,18 @@ config ARM_MEDIATEK_CCI_DEVFREQ
buck voltages and update a proper CCI frequency. Use the notification
to get the regulator status.
+config ARM_RK3328_DMC_DEVFREQ
+ tristate "ARM RK3328 DMC DEVFREQ Driver"
+ depends on ARCH_ROCKCHIP
+ select DEVFREQ_EVENT_ROCKCHIP_DFI
+ select DEVFREQ_GOV_SIMPLE_ONDEMAND
+ select PM_DEVFREQ_EVENT
+ select PM_OPP
+ help
+ This adds the DEVFREQ driver for the RK3328 DMC(Dynamic Memory Controller).
+ It sets the frequency for the memory controller and reads the usage counts
+ from hardware.
+
config ARM_RK3399_DMC_DEVFREQ
tristate "ARM RK3399 DMC DEVFREQ Driver"
depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) +=
obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o
obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o
obj-$(CONFIG_ARM_MEDIATEK_CCI_DEVFREQ) += mtk-cci-devfreq.o
+obj-$(CONFIG_ARM_RK3328_DMC_DEVFREQ) += rk3328_dmc.o
obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o
obj-$(CONFIG_ARM_SUN8I_A33_MBUS_DEVFREQ) += sun8i-a33-mbus.o
obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o
lede/target/linux/rockchip/patches-6.6/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch
+210
View File
@@ -0,0 +1,210 @@
From ce6d3614888e6358466f0e84e248177a6bca5258 Mon Sep 17 00:00:00 2001
From: Tang Yun ping <typ@rock-chips.com>
Date: Thu, 4 May 2017 20:49:58 +0800
Subject: [PATCH] clk: rockchip: support setting ddr clock via SIP Version 2
APIs
commit 764e893ee82321938fc6f4349e9e7caf06a04410 rockchip.
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Signed-off-by: hmz007 <hmz007@gmail.com>
---
drivers/clk/rockchip/clk-ddr.c | 130 ++++++++++++++++++++++++++++
drivers/clk/rockchip/clk-rk3328.c | 7 +-
drivers/clk/rockchip/clk.h | 3 +-
include/soc/rockchip/rockchip_sip.h | 11 +++
4 files changed, 147 insertions(+), 4 deletions(-)
--- a/drivers/clk/rockchip/clk-ddr.c
+++ b/drivers/clk/rockchip/clk-ddr.c
@@ -87,6 +87,133 @@ static const struct clk_ops rockchip_ddr
.get_parent = rockchip_ddrclk_get_parent,
};
+/* See v4.4/include/dt-bindings/display/rk_fb.h */
+#define SCREEN_NULL 0
+#define SCREEN_HDMI 6
+
+static inline int rk_drm_get_lcdc_type(void)
+{
+ return SCREEN_NULL;
+}
+
+struct share_params {
+ u32 hz;
+ u32 lcdc_type;
+ u32 vop;
+ u32 vop_dclk_mode;
+ u32 sr_idle_en;
+ u32 addr_mcu_el3;
+ /*
+ * 1: need to wait flag1
+ * 0: never wait flag1
+ */
+ u32 wait_flag1;
+ /*
+ * 1: need to wait flag1
+ * 0: never wait flag1
+ */
+ u32 wait_flag0;
+ u32 complt_hwirq;
+ /* if need, add parameter after */
+};
+
+struct rockchip_ddrclk_data {
+ u32 inited_flag;
+ void __iomem *share_memory;
+};
+
+static struct rockchip_ddrclk_data ddr_data;
+
+static void rockchip_ddrclk_data_init(void)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(ROCKCHIP_SIP_SHARE_MEM,
+ 1, SHARE_PAGE_TYPE_DDR, 0,
+ 0, 0, 0, 0, &res);
+
+ if (!res.a0) {
+ ddr_data.share_memory = (void __iomem *)ioremap(res.a1, 1<<12);
+ ddr_data.inited_flag = 1;
+ }
+}
+
+static int rockchip_ddrclk_sip_set_rate_v2(struct clk_hw *hw,
+ unsigned long drate,
+ unsigned long prate)
+{
+ struct share_params *p;
+ struct arm_smccc_res res;
+
+ if (!ddr_data.inited_flag)
+ rockchip_ddrclk_data_init();
+
+ p = (struct share_params *)ddr_data.share_memory;
+
+ p->hz = drate;
+ p->lcdc_type = rk_drm_get_lcdc_type();
+ p->wait_flag1 = 1;
+ p->wait_flag0 = 1;
+
+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ,
+ SHARE_PAGE_TYPE_DDR, 0,
+ ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE,
+ 0, 0, 0, 0, &res);
+
+ if ((int)res.a1 == -6) {
+ pr_err("%s: timeout, drate = %lumhz\n", __func__, drate/1000000);
+ /* TODO: rockchip_dmcfreq_wait_complete(); */
+ }
+
+ return res.a0;
+}
+
+static unsigned long rockchip_ddrclk_sip_recalc_rate_v2
+ (struct clk_hw *hw, unsigned long parent_rate)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ,
+ SHARE_PAGE_TYPE_DDR, 0,
+ ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE,
+ 0, 0, 0, 0, &res);
+ if (!res.a0)
+ return res.a1;
+ else
+ return 0;
+}
+
+static long rockchip_ddrclk_sip_round_rate_v2(struct clk_hw *hw,
+ unsigned long rate,
+ unsigned long *prate)
+{
+ struct share_params *p;
+ struct arm_smccc_res res;
+
+ if (!ddr_data.inited_flag)
+ rockchip_ddrclk_data_init();
+
+ p = (struct share_params *)ddr_data.share_memory;
+
+ p->hz = rate;
+
+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ,
+ SHARE_PAGE_TYPE_DDR, 0,
+ ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE,
+ 0, 0, 0, 0, &res);
+ if (!res.a0)
+ return res.a1;
+ else
+ return 0;
+}
+
+static const struct clk_ops rockchip_ddrclk_sip_ops_v2 = {
+ .recalc_rate = rockchip_ddrclk_sip_recalc_rate_v2,
+ .set_rate = rockchip_ddrclk_sip_set_rate_v2,
+ .round_rate = rockchip_ddrclk_sip_round_rate_v2,
+ .get_parent = rockchip_ddrclk_get_parent,
+};
+
struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
const char *const *parent_names,
u8 num_parents, int mux_offset,
@@ -114,6 +241,9 @@ struct clk *rockchip_clk_register_ddrclk
case ROCKCHIP_DDRCLK_SIP:
init.ops = &rockchip_ddrclk_sip_ops;
break;
+ case ROCKCHIP_DDRCLK_SIP_V2:
+ init.ops = &rockchip_ddrclk_sip_ops_v2;
+ break;
default:
pr_err("%s: unsupported ddrclk type %d\n", __func__, ddr_flag);
kfree(ddrclk);
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -315,9 +315,10 @@ static struct rockchip_clk_branch rk3328
RK3328_CLKGATE_CON(14), 1, GFLAGS),
/* PD_DDR */
- COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IGNORE_UNUSED,
- RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
- RK3328_CLKGATE_CON(0), 4, GFLAGS),
+ COMPOSITE_DDRCLK(SCLK_DDRCLK, "sclk_ddrc", mux_ddrphy_p, 0,
+ RK3328_CLKSEL_CON(3), 8, 2, 0, 3,
+ ROCKCHIP_DDRCLK_SIP_V2),
+
GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IGNORE_UNUSED,
RK3328_CLKGATE_CON(18), 6, GFLAGS),
GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED,
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -486,7 +486,8 @@ struct clk *rockchip_clk_register_mmc(co
* DDRCLK flags, including method of setting the rate
* ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate.
*/
-#define ROCKCHIP_DDRCLK_SIP BIT(0)
+#define ROCKCHIP_DDRCLK_SIP 0x01
+#define ROCKCHIP_DDRCLK_SIP_V2 0x03
struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
const char *const *parent_names,
--- a/include/soc/rockchip/rockchip_sip.h
+++ b/include/soc/rockchip/rockchip_sip.h
@@ -16,5 +16,16 @@
#define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ 0x06
#define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM 0x07
#define ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD 0x08
+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION 0x08
+
+#define ROCKCHIP_SIP_SHARE_MEM 0x82000009
+
+/* Share mem page types */
+typedef enum {
+ SHARE_PAGE_TYPE_INVALID = 0,
+ SHARE_PAGE_TYPE_UARTDBG,
+ SHARE_PAGE_TYPE_DDR,
+ SHARE_PAGE_TYPE_MAX,
+} share_page_type_t;
#endif
lede/target/linux/rockchip/patches-6.6/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch
+660
View File
@@ -0,0 +1,660 @@
From 4db93c6dad0c71750b86163df2fdb21c35f00d9a Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Tue, 19 Nov 2019 12:49:48 +0800
Subject: [PATCH] PM / devfreq: rockchip-dfi: add more soc support
Signed-off-by: hmz007 <hmz007@gmail.com>
---
drivers/devfreq/event/rockchip-dfi.c | 554 ++++++++++++++++++++++++---
1 file changed, 505 insertions(+), 49 deletions(-)
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -18,25 +18,66 @@
#include <linux/list.h>
#include <linux/of.h>
-#include <soc/rockchip/rk3399_grf.h>
-
-#define RK3399_DMC_NUM_CH 2
+#define PX30_PMUGRF_OS_REG2 0x208
+#define RK3128_GRF_SOC_CON0 0x140
+#define RK3128_GRF_OS_REG1 0x1cc
+#define RK3128_GRF_DFI_WRNUM 0x220
+#define RK3128_GRF_DFI_RDNUM 0x224
+#define RK3128_GRF_DFI_TIMERVAL 0x22c
+#define RK3128_DDR_MONITOR_EN ((1 << (16 + 6)) + (1 << 6))
+#define RK3128_DDR_MONITOR_DISB ((1 << (16 + 6)) + (0 << 6))
+
+#define RK3288_PMU_SYS_REG2 0x9c
+#define RK3288_GRF_SOC_CON4 0x254
+#define RK3288_GRF_SOC_STATUS(n) (0x280 + (n) * 4)
+#define RK3288_DFI_EN (0x30003 << 14)
+#define RK3288_DFI_DIS (0x30000 << 14)
+#define RK3288_LPDDR_SEL (0x10001 << 13)
+#define RK3288_DDR3_SEL (0x10000 << 13)
+
+#define RK3328_GRF_OS_REG2 0x5d0
+
+#define RK3368_GRF_DDRC0_CON0 0x600
+#define RK3368_GRF_SOC_STATUS5 0x494
+#define RK3368_GRF_SOC_STATUS6 0x498
+#define RK3368_GRF_SOC_STATUS8 0x4a0
+#define RK3368_GRF_SOC_STATUS9 0x4a4
+#define RK3368_GRF_SOC_STATUS10 0x4a8
+#define RK3368_DFI_EN (0x30003 << 5)
+#define RK3368_DFI_DIS (0x30000 << 5)
+
+#define MAX_DMC_NUM_CH 2
+#define READ_DRAMTYPE_INFO(n) (((n) >> 13) & 0x7)
+#define READ_CH_INFO(n) (((n) >> 28) & 0x3)
/* DDRMON_CTRL */
-#define DDRMON_CTRL 0x04
-#define CLR_DDRMON_CTRL (0x1f0000 << 0)
-#define LPDDR4_EN (0x10001 << 4)
-#define HARDWARE_EN (0x10001 << 3)
-#define LPDDR3_EN (0x10001 << 2)
-#define SOFTWARE_EN (0x10001 << 1)
-#define SOFTWARE_DIS (0x10000 << 1)
-#define TIME_CNT_EN (0x10001 << 0)
+#define DDRMON_CTRL 0x04
+#define CLR_DDRMON_CTRL (0x3f0000 << 0)
+#define DDR4_EN (0x10001 << 5)
+#define LPDDR4_EN (0x10001 << 4)
+#define HARDWARE_EN (0x10001 << 3)
+#define LPDDR2_3_EN (0x10001 << 2)
+#define SOFTWARE_EN (0x10001 << 1)
+#define SOFTWARE_DIS (0x10000 << 1)
+#define TIME_CNT_EN (0x10001 << 0)
#define DDRMON_CH0_COUNT_NUM 0x28
#define DDRMON_CH0_DFI_ACCESS_NUM 0x2c
#define DDRMON_CH1_COUNT_NUM 0x3c
#define DDRMON_CH1_DFI_ACCESS_NUM 0x40
+/* pmu grf */
+#define PMUGRF_OS_REG2 0x308
+
+enum {
+ DDR4 = 0,
+ DDR3 = 3,
+ LPDDR2 = 5,
+ LPDDR3 = 6,
+ LPDDR4 = 7,
+ UNUSED = 0xFF
+};
+
struct dmc_usage {
u32 access;
u32 total;
@@ -50,33 +91,261 @@ struct dmc_usage {
struct rockchip_dfi {
struct devfreq_event_dev *edev;
struct devfreq_event_desc *desc;
- struct dmc_usage ch_usage[RK3399_DMC_NUM_CH];
+ struct dmc_usage ch_usage[MAX_DMC_NUM_CH];
struct device *dev;
void __iomem *regs;
struct regmap *regmap_pmu;
+ struct regmap *regmap_grf;
+ struct regmap *regmap_pmugrf;
struct clk *clk;
+ u32 dram_type;
+ /*
+ * available mask, 1: available, 0: not available
+ * each bit represent a channel
+ */
+ u32 ch_msk;
+};
+
+static void rk3128_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+
+ regmap_write(info->regmap_grf,
+ RK3128_GRF_SOC_CON0,
+ RK3128_DDR_MONITOR_EN);
+}
+
+static void rk3128_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+
+ regmap_write(info->regmap_grf,
+ RK3128_GRF_SOC_CON0,
+ RK3128_DDR_MONITOR_DISB);
+}
+
+static int rk3128_dfi_disable(struct devfreq_event_dev *edev)
+{
+ rk3128_dfi_stop_hardware_counter(edev);
+
+ return 0;
+}
+
+static int rk3128_dfi_enable(struct devfreq_event_dev *edev)
+{
+ rk3128_dfi_start_hardware_counter(edev);
+
+ return 0;
+}
+
+static int rk3128_dfi_set_event(struct devfreq_event_dev *edev)
+{
+ return 0;
+}
+
+static int rk3128_dfi_get_event(struct devfreq_event_dev *edev,
+ struct devfreq_event_data *edata)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+ unsigned long flags;
+ u32 dfi_wr, dfi_rd, dfi_timer;
+
+ local_irq_save(flags);
+
+ rk3128_dfi_stop_hardware_counter(edev);
+
+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_WRNUM, &dfi_wr);
+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_RDNUM, &dfi_rd);
+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_TIMERVAL, &dfi_timer);
+
+ edata->load_count = (dfi_wr + dfi_rd) * 4;
+ edata->total_count = dfi_timer;
+
+ rk3128_dfi_start_hardware_counter(edev);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static const struct devfreq_event_ops rk3128_dfi_ops = {
+ .disable = rk3128_dfi_disable,
+ .enable = rk3128_dfi_enable,
+ .get_event = rk3128_dfi_get_event,
+ .set_event = rk3128_dfi_set_event,
+};
+
+static void rk3288_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+
+ regmap_write(info->regmap_grf, RK3288_GRF_SOC_CON4, RK3288_DFI_EN);
+}
+
+static void rk3288_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+
+ regmap_write(info->regmap_grf, RK3288_GRF_SOC_CON4, RK3288_DFI_DIS);
+}
+
+static int rk3288_dfi_disable(struct devfreq_event_dev *edev)
+{
+ rk3288_dfi_stop_hardware_counter(edev);
+
+ return 0;
+}
+
+static int rk3288_dfi_enable(struct devfreq_event_dev *edev)
+{
+ rk3288_dfi_start_hardware_counter(edev);
+
+ return 0;
+}
+
+static int rk3288_dfi_set_event(struct devfreq_event_dev *edev)
+{
+ return 0;
+}
+
+static int rk3288_dfi_get_busier_ch(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+ u32 tmp, max = 0;
+ u32 i, busier_ch = 0;
+ u32 rd_count, wr_count, total_count;
+
+ rk3288_dfi_stop_hardware_counter(edev);
+
+ /* Find out which channel is busier */
+ for (i = 0; i < MAX_DMC_NUM_CH; i++) {
+ if (!(info->ch_msk & BIT(i)))
+ continue;
+ regmap_read(info->regmap_grf,
+ RK3288_GRF_SOC_STATUS(11 + i * 4), &wr_count);
+ regmap_read(info->regmap_grf,
+ RK3288_GRF_SOC_STATUS(12 + i * 4), &rd_count);
+ regmap_read(info->regmap_grf,
+ RK3288_GRF_SOC_STATUS(14 + i * 4), &total_count);
+ info->ch_usage[i].access = (wr_count + rd_count) * 4;
+ info->ch_usage[i].total = total_count;
+ tmp = info->ch_usage[i].access;
+ if (tmp > max) {
+ busier_ch = i;
+ max = tmp;
+ }
+ }
+ rk3288_dfi_start_hardware_counter(edev);
+
+ return busier_ch;
+}
+
+static int rk3288_dfi_get_event(struct devfreq_event_dev *edev,
+ struct devfreq_event_data *edata)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+ int busier_ch;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ busier_ch = rk3288_dfi_get_busier_ch(edev);
+ local_irq_restore(flags);
+
+ edata->load_count = info->ch_usage[busier_ch].access;
+ edata->total_count = info->ch_usage[busier_ch].total;
+
+ return 0;
+}
+
+static const struct devfreq_event_ops rk3288_dfi_ops = {
+ .disable = rk3288_dfi_disable,
+ .enable = rk3288_dfi_enable,
+ .get_event = rk3288_dfi_get_event,
+ .set_event = rk3288_dfi_set_event,
+};
+
+static void rk3368_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+
+ regmap_write(info->regmap_grf, RK3368_GRF_DDRC0_CON0, RK3368_DFI_EN);
+}
+
+static void rk3368_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+
+ regmap_write(info->regmap_grf, RK3368_GRF_DDRC0_CON0, RK3368_DFI_DIS);
+}
+
+static int rk3368_dfi_disable(struct devfreq_event_dev *edev)
+{
+ rk3368_dfi_stop_hardware_counter(edev);
+
+ return 0;
+}
+
+static int rk3368_dfi_enable(struct devfreq_event_dev *edev)
+{
+ rk3368_dfi_start_hardware_counter(edev);
+
+ return 0;
+}
+
+static int rk3368_dfi_set_event(struct devfreq_event_dev *edev)
+{
+ return 0;
+}
+
+static int rk3368_dfi_get_event(struct devfreq_event_dev *edev,
+ struct devfreq_event_data *edata)
+{
+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
+ unsigned long flags;
+ u32 dfi0_wr, dfi0_rd, dfi1_wr, dfi1_rd, dfi_timer;
+
+ local_irq_save(flags);
+
+ rk3368_dfi_stop_hardware_counter(edev);
+
+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS5, &dfi0_wr);
+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS6, &dfi0_rd);
+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS9, &dfi1_wr);
+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS10, &dfi1_rd);
+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS8, &dfi_timer);
+
+ edata->load_count = (dfi0_wr + dfi0_rd + dfi1_wr + dfi1_rd) * 2;
+ edata->total_count = dfi_timer;
+
+ rk3368_dfi_start_hardware_counter(edev);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
+
+static const struct devfreq_event_ops rk3368_dfi_ops = {
+ .disable = rk3368_dfi_disable,
+ .enable = rk3368_dfi_enable,
+ .get_event = rk3368_dfi_get_event,
+ .set_event = rk3368_dfi_set_event,
};
static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
{
struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
void __iomem *dfi_regs = info->regs;
- u32 val;
- u32 ddr_type;
-
- /* get ddr type */
- regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
- ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
- RK3399_PMUGRF_DDRTYPE_MASK;
/* clear DDRMON_CTRL setting */
writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL);
/* set ddr type to dfi */
- if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3)
- writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL);
- else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4)
+ if (info->dram_type == LPDDR3 || info->dram_type == LPDDR2)
+ writel_relaxed(LPDDR2_3_EN, dfi_regs + DDRMON_CTRL);
+ else if (info->dram_type == LPDDR4)
writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
+ else if (info->dram_type == DDR4)
+ writel_relaxed(DDR4_EN, dfi_regs + DDRMON_CTRL);
/* enable count, use software mode */
writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL);
@@ -100,12 +369,22 @@ static int rockchip_dfi_get_busier_ch(st
rockchip_dfi_stop_hardware_counter(edev);
/* Find out which channel is busier */
- for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
- info->ch_usage[i].access = readl_relaxed(dfi_regs +
- DDRMON_CH0_DFI_ACCESS_NUM + i * 20) * 4;
+ for (i = 0; i < MAX_DMC_NUM_CH; i++) {
+ if (!(info->ch_msk & BIT(i)))
+ continue;
+
info->ch_usage[i].total = readl_relaxed(dfi_regs +
DDRMON_CH0_COUNT_NUM + i * 20);
- tmp = info->ch_usage[i].access;
+
+ /* LPDDR4 BL = 16,other DDR type BL = 8 */
+ tmp = readl_relaxed(dfi_regs +
+ DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
+ if (info->dram_type == LPDDR4)
+ tmp *= 8;
+ else
+ tmp *= 4;
+ info->ch_usage[i].access = tmp;
+
if (tmp > max) {
busier_ch = i;
max = tmp;
@@ -121,7 +400,8 @@ static int rockchip_dfi_disable(struct d
struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
rockchip_dfi_stop_hardware_counter(edev);
- clk_disable_unprepare(info->clk);
+ if (info->clk)
+ clk_disable_unprepare(info->clk);
return 0;
}
@@ -131,10 +411,13 @@ static int rockchip_dfi_enable(struct de
struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
int ret;
- ret = clk_prepare_enable(info->clk);
- if (ret) {
- dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret);
- return ret;
+ if (info->clk) {
+ ret = clk_prepare_enable(info->clk);
+ if (ret) {
+ dev_err(&edev->dev, "failed to enable dfi clk: %d\n",
+ ret);
+ return ret;
+ }
}
rockchip_dfi_start_hardware_counter(edev);
@@ -151,8 +434,11 @@ static int rockchip_dfi_get_event(struct
{
struct rockchip_dfi *info = devfreq_event_get_drvdata(edev);
int busier_ch;
+ unsigned long flags;
+ local_irq_save(flags);
busier_ch = rockchip_dfi_get_busier_ch(edev);
+ local_irq_restore(flags);
edata->load_count = info->ch_usage[busier_ch].access;
edata->total_count = info->ch_usage[busier_ch].total;
@@ -167,22 +453,116 @@ static const struct devfreq_event_ops ro
.set_event = rockchip_dfi_set_event,
};
-static const struct of_device_id rockchip_dfi_id_match[] = {
- { .compatible = "rockchip,rk3399-dfi" },
- { },
-};
-MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match);
+static __init int px30_dfi_init(struct platform_device *pdev,
+ struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc)
+{
+ struct device_node *np = pdev->dev.of_node, *node;
+ struct resource *res;
+ u32 val;
-static int rockchip_dfi_probe(struct platform_device *pdev)
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ data->regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(data->regs))
+ return PTR_ERR(data->regs);
+
+ node = of_parse_phandle(np, "rockchip,pmugrf", 0);
+ if (node) {
+ data->regmap_pmugrf = syscon_node_to_regmap(node);
+ if (IS_ERR(data->regmap_pmugrf))
+ return PTR_ERR(data->regmap_pmugrf);
+ }
+
+ regmap_read(data->regmap_pmugrf, PX30_PMUGRF_OS_REG2, &val);
+ data->dram_type = READ_DRAMTYPE_INFO(val);
+ data->ch_msk = 1;
+ data->clk = NULL;
+
+ desc->ops = &rockchip_dfi_ops;
+
+ return 0;
+}
+
+static __init int rk3128_dfi_init(struct platform_device *pdev,
+ struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc)
{
- struct device *dev = &pdev->dev;
- struct rockchip_dfi *data;
- struct devfreq_event_desc *desc;
struct device_node *np = pdev->dev.of_node, *node;
- data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL);
- if (!data)
- return -ENOMEM;
+ node = of_parse_phandle(np, "rockchip,grf", 0);
+ if (node) {
+ data->regmap_grf = syscon_node_to_regmap(node);
+ if (IS_ERR(data->regmap_grf))
+ return PTR_ERR(data->regmap_grf);
+ }
+
+ desc->ops = &rk3128_dfi_ops;
+
+ return 0;
+}
+
+static __init int rk3288_dfi_init(struct platform_device *pdev,
+ struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc)
+{
+ struct device_node *np = pdev->dev.of_node, *node;
+ u32 val;
+
+ node = of_parse_phandle(np, "rockchip,pmu", 0);
+ if (node) {
+ data->regmap_pmu = syscon_node_to_regmap(node);
+ if (IS_ERR(data->regmap_pmu))
+ return PTR_ERR(data->regmap_pmu);
+ }
+
+ node = of_parse_phandle(np, "rockchip,grf", 0);
+ if (node) {
+ data->regmap_grf = syscon_node_to_regmap(node);
+ if (IS_ERR(data->regmap_grf))
+ return PTR_ERR(data->regmap_grf);
+ }
+
+ regmap_read(data->regmap_pmu, RK3288_PMU_SYS_REG2, &val);
+ data->dram_type = READ_DRAMTYPE_INFO(val);
+ data->ch_msk = READ_CH_INFO(val);
+
+ if (data->dram_type == DDR3)
+ regmap_write(data->regmap_grf, RK3288_GRF_SOC_CON4,
+ RK3288_DDR3_SEL);
+ else
+ regmap_write(data->regmap_grf, RK3288_GRF_SOC_CON4,
+ RK3288_LPDDR_SEL);
+
+ desc->ops = &rk3288_dfi_ops;
+
+ return 0;
+}
+
+static __init int rk3368_dfi_init(struct platform_device *pdev,
+ struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc)
+{
+ struct device *dev = &pdev->dev;
+
+ if (!dev->parent || !dev->parent->of_node)
+ return -EINVAL;
+
+ data->regmap_grf = syscon_node_to_regmap(dev->parent->of_node);
+ if (IS_ERR(data->regmap_grf))
+ return PTR_ERR(data->regmap_grf);
+
+ desc->ops = &rk3368_dfi_ops;
+
+ return 0;
+}
+
+static __init int rockchip_dfi_init(struct platform_device *pdev,
+ struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = pdev->dev.of_node, *node;
+ u32 val;
data->regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(data->regs))
@@ -202,21 +582,95 @@ static int rockchip_dfi_probe(struct pla
if (IS_ERR(data->regmap_pmu))
return PTR_ERR(data->regmap_pmu);
- data->dev = dev;
+ regmap_read(data->regmap_pmu, PMUGRF_OS_REG2, &val);
+ data->dram_type = READ_DRAMTYPE_INFO(val);
+ data->ch_msk = READ_CH_INFO(val);
+
+ desc->ops = &rockchip_dfi_ops;
+
+ return 0;
+}
+
+static __init int rk3328_dfi_init(struct platform_device *pdev,
+ struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc)
+{
+ struct device_node *np = pdev->dev.of_node, *node;
+ struct resource *res;
+ u32 val;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ data->regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(data->regs))
+ return PTR_ERR(data->regs);
+
+ node = of_parse_phandle(np, "rockchip,grf", 0);
+ if (node) {
+ data->regmap_grf = syscon_node_to_regmap(node);
+ if (IS_ERR(data->regmap_grf))
+ return PTR_ERR(data->regmap_grf);
+ }
+
+ regmap_read(data->regmap_grf, RK3328_GRF_OS_REG2, &val);
+ data->dram_type = READ_DRAMTYPE_INFO(val);
+ data->ch_msk = 1;
+ data->clk = NULL;
+
+ desc->ops = &rockchip_dfi_ops;
+
+ return 0;
+}
+
+static const struct of_device_id rockchip_dfi_id_match[] = {
+ { .compatible = "rockchip,px30-dfi", .data = px30_dfi_init },
+ { .compatible = "rockchip,rk1808-dfi", .data = px30_dfi_init },
+ { .compatible = "rockchip,rk3128-dfi", .data = rk3128_dfi_init },
+ { .compatible = "rockchip,rk3288-dfi", .data = rk3288_dfi_init },
+ { .compatible = "rockchip,rk3328-dfi", .data = rk3328_dfi_init },
+ { .compatible = "rockchip,rk3368-dfi", .data = rk3368_dfi_init },
+ { .compatible = "rockchip,rk3399-dfi", .data = rockchip_dfi_init },
+ { },
+};
+MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match);
+
+static int rockchip_dfi_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct rockchip_dfi *data;
+ struct devfreq_event_desc *desc;
+ struct device_node *np = pdev->dev.of_node;
+ const struct of_device_id *match;
+ int (*init)(struct platform_device *pdev, struct rockchip_dfi *data,
+ struct devfreq_event_desc *desc);
+
+ data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
if (!desc)
return -ENOMEM;
- desc->ops = &rockchip_dfi_ops;
+ match = of_match_node(rockchip_dfi_id_match, pdev->dev.of_node);
+ if (match) {
+ init = match->data;
+ if (init) {
+ if (init(pdev, data, desc))
+ return -EINVAL;
+ } else {
+ return 0;
+ }
+ } else {
+ return 0;
+ }
desc->driver_data = data;
desc->name = np->name;
data->desc = desc;
+ data->dev = dev;
- data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc);
+ data->edev = devm_devfreq_event_add_edev(dev, desc);
if (IS_ERR(data->edev)) {
- dev_err(&pdev->dev,
- "failed to add devfreq-event device\n");
+ dev_err(dev, "failed to add devfreq-event device\n");
return PTR_ERR(data->edev);
}
lede/target/linux/rockchip/patches-6.6/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch
+27
View File
@@ -0,0 +1,27 @@
From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Tue, 19 Nov 2019 14:21:51 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3328: add dfi node
Signed-off-by: hmz007 <hmz007@gmail.com>
[adjusted commit title]
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 7 +++++++
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1025,6 +1025,13 @@
status = "disabled";
};
+ dfi: dfi@ff790000 {
+ reg = <0x00 0xff790000 0x00 0x400>;
+ compatible = "rockchip,rk3328-dfi";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
lede/target/linux/rockchip/patches-6.6/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch
+126
View File
@@ -0,0 +1,126 @@
From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001
From: hmz007 <hmz007@gmail.com>
Date: Tue, 19 Nov 2019 14:21:51 +0800
Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node
Signed-off-by: hmz007 <hmz007@gmail.com>
---
.../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++
.../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++-
include/dt-bindings/clock/rockchip-ddr.h | 63 ++++
include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++
4 files changed, 617 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi
create mode 100644 include/dt-bindings/clock/rockchip-ddr.h
create mode 100644 include/dt-bindings/memory/rk3328-dram.h
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -7,6 +7,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
+#include "rk3328-dram-default-timing.dtsi"
#include "rk3328.dtsi"
/ {
@@ -114,6 +115,72 @@
regulator-boot-on;
vin-supply = <&vdd_5v>;
};
+
+ dmc: dmc {
+ compatible = "rockchip,rk3328-dmc";
+ devfreq-events = <&dfi>;
+ center-supply = <&vdd_log>;
+ clocks = <&cru SCLK_DDRCLK>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <&dmc_opp_table>;
+ ddr_timing = <&ddr_timing>;
+ upthreshold = <40>;
+ downdifferential = <20>;
+ auto-min-freq = <786000>;
+ auto-freq-en = <0>;
+ #cooling-cells = <2>;
+ status = "okay";
+
+ ddr_power_model: ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <120>;
+ static-power-coefficient = <200>;
+ ts = <32000 4700 (-80) 2>;
+ thermal-zone = "soc-thermal";
+ };
+ };
+
+ dmc_opp_table: dmc-opp-table {
+ compatible = "operating-points-v2";
+
+ rockchip,leakage-voltage-sel = <
+ 1 10 0
+ 11 254 1
+ >;
+ nvmem-cells = <&logic_leakage>;
+ nvmem-cell-names = "ddr_leakage";
+
+ opp-786000000 {
+ opp-hz = /bits/ 64 <786000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-798000000 {
+ opp-hz = /bits/ 64 <798000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-840000000 {
+ opp-hz = /bits/ 64 <840000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-924000000 {
+ opp-hz = /bits/ 64 <924000000>;
+ opp-microvolt = <1100000>;
+ opp-microvolt-L0 = <1100000>;
+ opp-microvolt-L1 = <1075000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1175000>;
+ opp-microvolt-L0 = <1175000>;
+ opp-microvolt-L1 = <1150000>;
+ };
+ };
};
&cpu0 {
@@ -132,6 +199,10 @@
cpu-supply = <&vdd_arm>;
};
+&dfi {
+ status = "okay";
+};
+
&display_subsystem {
status = "disabled";
};
@@ -199,6 +270,7 @@
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
+ regulator-init-microvolt = <1075000>;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <12500>;
@@ -213,6 +285,7 @@
regulator-name = "vdd_arm";
regulator-always-on;
regulator-boot-on;
+ regulator-init-microvolt = <1225000>;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <12500>;
lede/target/linux/rockchip/patches-6.6/991-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch
+44
View File
@@ -0,0 +1,44 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Leonidas P. Papadakos <papadakospan@gmail.com>
Date: Fri, 1 Mar 2019 21:55:53 +0200
Subject: [PATCH v2] arm64: dts: rockchip: add more cpu operating points for
RK3328
This allows for greater max frequency on rk3328 boards,
increasing performance.
It has been included in Armbian (a linux distibution for ARM boards)
for a while now without any reported issues
https://github.com/armbian/build/blob/master/patch/kernel/rockchip64-default/enable-1392mhz-opp.patch
https://github.com/armbian/build/blob/master/patch/kernel/rockchip64-default/enable-1512mhz-opp.patch
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 15 +++++++++++++++
1 files changed, 15 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -142,6 +142,21 @@
opp-microvolt = <1300000>;
clock-latency-ns = <40000>;
};
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1350000>;
+ clock-latency-ns = <40000>;
+ };
+ opp-1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1450000>;
+ clock-latency-ns = <40000>;
+ };
+ opp-1608000000 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1450000>;
+ clock-latency-ns = <40000>;
+ };
};
analog_sound: analog-sound {
lede/target/linux/rockchip/patches-6.6/992-rockchip-rk3399-overclock-to-2.2-1.8-GHz.patch
+46
View File
@@ -0,0 +1,46 @@
From 04202df5cb497b1934c95211cf43784ef62245a4 Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Mon, 18 Oct 2021 12:47:30 +0800
Subject: [PATCH] rockchip: rk3399: overclock to 2.2/1.8 GHz
It's stable enough to overclock cpu frequency to 2.2/1.8 GHz,
and for better performance.
Co-development-by: gzelvis <gzelvis@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
@@ -33,6 +33,14 @@
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1125000 1125000 1250000>;
};
+ opp06 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <1225000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1275000>;
+ };
};
cluster1_opp: opp-table-1 {
@@ -72,6 +80,14 @@
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1200000 1200000 1250000>;
};
+ opp08 {
+ opp-hz = /bits/ 64 <2016000000>;
+ opp-microvolt = <1250000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-microvolt = <1325000>;
+ };
};
gpu_opp_table: opp-table-2 {
mihomo/component/iface/iface.go
+15 -8
View File
@@ -40,16 +40,23 @@ func ResolveInterface(name string) (*Interface, error) {
ipNets := make([]netip.Prefix, 0, len(addrs))
for _, addr := range addrs {
ipNet := addr.(*net.IPNet)
ip, _ := netip.AddrFromSlice(ipNet.IP)
ones, bits := ipNet.Mask.Size()
if bits == 32 {
var pf netip.Prefix
switch ipNet := addr.(type) {
case *net.IPNet:
ip, _ := netip.AddrFromSlice(ipNet.IP)
ones, bits := ipNet.Mask.Size()
if bits == 32 {
ip = ip.Unmap()
}
pf = netip.PrefixFrom(ip, ones)
case *net.IPAddr:
ip, _ := netip.AddrFromSlice(ipNet.IP)
ip = ip.Unmap()
pf = netip.PrefixFrom(ip, ip.BitLen())
}
if pf.IsValid() {
ipNets = append(ipNets, pf)
}
pf := netip.PrefixFrom(ip, ones)
ipNets = append(ipNets, pf)
}
r[iface.Name] = &Interface{
mihomo/config/config.go
+2
View File
@@ -265,6 +265,7 @@ type RawTun struct {
EndpointIndependentNat bool `yaml:"endpoint-independent-nat" json:"endpoint_independent_nat,omitempty"`
UDPTimeout int64 `yaml:"udp-timeout" json:"udp_timeout,omitempty"`
FileDescriptor int `yaml:"file-descriptor" json:"file-descriptor"`
TableIndex int `yaml:"table-index" json:"table-index"`
}
type RawTuicServer struct {
@@ -1448,6 +1449,7 @@ func parseTun(rawTun RawTun, general *General) error {
EndpointIndependentNat: rawTun.EndpointIndependentNat,
UDPTimeout: rawTun.UDPTimeout,
FileDescriptor: rawTun.FileDescriptor,
TableIndex: rawTun.TableIndex,
}
return nil
mihomo/hub/route/configs.go
+4
View File
@@ -91,6 +91,7 @@ type tunSchema struct {
EndpointIndependentNat *bool `yaml:"endpoint-independent-nat" json:"endpoint-independent-nat,omitempty"`
UDPTimeout *int64 `yaml:"udp-timeout" json:"udp-timeout,omitempty"`
FileDescriptor *int `yaml:"file-descriptor" json:"file-descriptor"`
TableIndex *int `yaml:"table-index" json:"table-index"`
}
type tuicServerSchema struct {
@@ -209,6 +210,9 @@ func pointerOrDefaultTun(p *tunSchema, def LC.Tun) LC.Tun {
if p.FileDescriptor != nil {
def.FileDescriptor = *p.FileDescriptor
}
if p.TableIndex != nil {
def.TableIndex = *p.TableIndex
}
}
return def
}
mihomo/listener/config/tun.go
+1
View File
@@ -49,4 +49,5 @@ type Tun struct {
EndpointIndependentNat bool `yaml:"endpoint-independent-nat" json:"endpoint-independent-nat,omitempty"`
UDPTimeout int64 `yaml:"udp-timeout" json:"udp-timeout,omitempty"`
FileDescriptor int `yaml:"file-descriptor" json:"file-descriptor"`
TableIndex int `yaml:"table-index" json:"table-index"`
}
mihomo/listener/inbound/tun.go
+2
View File
@@ -40,6 +40,7 @@ type TunOption struct {
EndpointIndependentNat bool `inbound:"endpoint_independent_nat,omitempty"`
UDPTimeout int64 `inbound:"udp_timeout,omitempty"`
FileDescriptor int `inbound:"file-descriptor,omitempty"`
TableIndex int `inbound:"table-index,omitempty"`
}
func (o TunOption) Equal(config C.InboundConfig) bool {
@@ -118,6 +119,7 @@ func NewTun(options *TunOption) (*Tun, error) {
EndpointIndependentNat: options.EndpointIndependentNat,
UDPTimeout: options.UDPTimeout,
FileDescriptor: options.FileDescriptor,
TableIndex: options.TableIndex,
},
}, nil
}
mihomo/listener/listener.go
+2 -1
View File
@@ -823,7 +823,8 @@ func hasTunConfigChange(tunConf *LC.Tun) bool {
LastTunConf.StrictRoute != tunConf.StrictRoute ||
LastTunConf.EndpointIndependentNat != tunConf.EndpointIndependentNat ||
LastTunConf.UDPTimeout != tunConf.UDPTimeout ||
LastTunConf.FileDescriptor != tunConf.FileDescriptor {
LastTunConf.FileDescriptor != tunConf.FileDescriptor ||
LastTunConf.TableIndex != tunConf.TableIndex {
return true
}
mihomo/listener/sing_tun/server.go
+5 -1
View File
@@ -112,6 +112,10 @@ func New(options LC.Tun, tunnel C.Tunnel, additions ...inbound.Addition) (l *Lis
} else {
udpTimeout = int64(sing.UDPTimeout.Seconds())
}
tableIndex := options.TableIndex
if tableIndex == 0 {
tableIndex = 2022
}
includeUID := uidToRange(options.IncludeUID)
if len(options.IncludeUIDRange) > 0 {
var err error
@@ -225,7 +229,7 @@ func New(options LC.Tun, tunnel C.Tunnel, additions ...inbound.Addition) (l *Lis
ExcludePackage: options.ExcludePackage,
FileDescriptor: options.FileDescriptor,
InterfaceMonitor: defaultInterfaceMonitor,
TableIndex: 2022,
TableIndex: tableIndex,
}
err = l.buildAndroidRules(&tunOptions)
naiveproxy/CHROMIUM_VERSION
+1 -1
View File
@@ -1 +1 @@
122.0.6261.43
123.0.6312.40
naiveproxy/src/AUTHORS
+5
View File
@@ -814,6 +814,7 @@ Lenny Khazan <lenny.khazan@gmail.com>
Leo Wolf <jclw@ymail.com>
Leon Han <leon.han@intel.com>
Leung Wing Chung <lwchkg@gmail.com>
Levi Zim <rsworktech@outlook.com>
Li Yanbo <liyanbo.monster@bytedance.com>
Li Yin <li.yin@intel.com>
Lian Ruilong <lianrl@dingdao.com>
@@ -867,6 +868,7 @@ Manuel Palenzuela Merino <manuelpalenzuelamerino@gmail.com>
Mao Yujie <maojie0924@gmail.com>
Mao Yujie <yujie.mao@intel.com>
Marc des Garets <marc.desgarets@googlemail.com>
Marcello Balduccini <marcello.balduccini@gmail.com>
Marcio Caroso <msscaroso@gmail.com>
Marcin Wiacek <marcin@mwiacek.com>
Marco Monaco <marco.monaco@ocado.com>
@@ -984,6 +986,7 @@ Nagarjuna Atluri <nagarjuna.a@samsung.com>
Naiem Shaik <naiem.shaik@gmail.com>
Naman Kumar Narula <namankumarnarula@gmail.com>
Naman Yadav <naman.yadav@samsung.com>
Nancy Tillery <hedonistsmith@gmail.com>
Naoki Takano <takano.naoki@gmail.com>
Naoto Ono <onoto1998@gmail.com>
Naresh Pratap Singh <naresh.singh@samsung.com>
@@ -1545,6 +1548,7 @@ Zhenyu Shan <zhenyu.shan@intel.com>
Zhibo Wang <zhibo1.wang@intel.com>
Zhifei Fang <facetothefate@gmail.com>
Zhiyuan Ye <zhiyuanye@tencent.com>
Zhongwei Wang <carolwolfking@gmail.com>
Zhou Jun <zhoujun@uniontech.com>
Zhuoyu Qian <zhuoyu.qian@samsung.com>
Ziran Sun <ziran.sun@samsung.com>
@@ -1557,6 +1561,7 @@ Zsolt Borbely <zsborbely.u-szeged@partner.samsung.com>
方觉 (Fang Jue) <fangjue23303@gmail.com>
迷渡 <justjavac@gmail.com>
郑苏波 (Super Zheng) <superzheng@tencent.com>
一丝 (Yisi) <yiorsi@gmail.com>
# Please DO NOT APPEND here. See comments at the top of the file.
# END individuals section.
naiveproxy/src/DEPS
+207 -99
View File
@@ -241,7 +241,7 @@ vars = {
#
# CQ_INCLUDE_TRYBOTS=luci.chrome.try:lacros-amd64-generic-chrome-skylab
# CQ_INCLUDE_TRYBOTS=luci.chrome.try:lacros-arm-generic-chrome-skylab
'lacros_sdk_version': '15746.0.0',
'lacros_sdk_version': '15778.0.0',
# Generate location tag metadata to include in tests result data uploaded
# to ResultDB. This isn't needed on some configs and the tool that generates
@@ -253,7 +253,7 @@ vars = {
# luci-go CIPD package version.
# Make sure the revision is uploaded by infra-packagers builder.
# https://ci.chromium.org/p/infra-internal/g/infra-packagers/console
'luci_go': 'git_revision:0d11be367258bfe14a13ff1afcf43a0bc6aedb45',
'luci_go': 'git_revision:3df60a11d33a59614c0e8d2bccc58d8c30984901',
# This can be overridden, e.g. with custom_vars, to build clang from HEAD
# instead of downloading the prebuilt pinned revision.
@@ -272,19 +272,21 @@ vars = {
# reclient CIPD package
'reclient_package': 'infra/rbe/client/',
# reclient CIPD package version
'reclient_version': 're_client_version:0.126.0.4aaef37-gomaip',
'reclient_version': 're_client_version:0.131.1.784ddbb-gomaip',
# screen-ai CIPD package Linux version
# screen-ai CIPD packages
# TODO(b/281483558): Use a tag to download the latest version of screen-ai
# (e.g. 'version:121.3') and find a way to automate updating //DEPS with it.
'screen_ai_linux': 'x8c4xOQj3V2uyBicjNa2YkN71brkj5FZg157RueHF_oC',
'screen_ai_macos_amd64': 'STOrwjObcsaURUq2izEeXtnwtRhC5HLOTrcfXssSSioC',
'screen_ai_macos_arm64': 'bxhon5NsSW9znRLRHd79tTy_bkPCZojzLWb57La9RxsC',
# The path of the sysroots.json file.
# This is used by vendor builds like Electron.
'sysroots_json_path': 'build/linux/sysroot_scripts/sysroots.json',
# siso CIPD package version.
'siso_version': 'git_revision:c892a2c62436b0d4ffbf1e5c559c73cd0f5c7e31',
'siso_version': 'git_revision:b52a6552a2e17e34b747fd5d29875fc4aba99da8',
# download libaom test data
'download_libaom_testdata': False,
@@ -304,38 +306,38 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling V8
# and whatever else without interference from each other.
'src_internal_revision': '05c5d674b2d43ae813314cd749f0392813995748',
'src_internal_revision': '302c17cb1ff9916cf20177141cdddd21ff2c330b',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling Skia
# and whatever else without interference from each other.
'skia_revision': 'c6835e2d5ff641dad9347ce4c2ff79dbc29cf9aa',
'skia_revision': 'aeae2261c7d380404fb8e53eb6062338c4ba0367',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling V8
# and whatever else without interference from each other.
'v8_revision': '15126d82086f526657d8889dfda0bc269e503ff9',
'v8_revision': 'f0b4342fe7f3849aeb19a1dc77f4c8ad5fd68688',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling ANGLE
# and whatever else without interference from each other.
'angle_revision': 'f9bad5e27d61e2ab6a7504b1793be5aa14eb1414',
'angle_revision': 'e17dd5a40854c485cd397e2db55e860175566201',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling SwiftShader
# and whatever else without interference from each other.
'swiftshader_revision': '2fa7e9b99ae4e70ea5ae2cc9c8d3afb43391384f',
'swiftshader_revision': 'eb75201a4e0354a36d315dd01077092ec9aa2356',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling PDFium
# and whatever else without interference from each other.
'pdfium_revision': '4c4f9ab25dab142d7888f3258ab54df24b97b44f',
'pdfium_revision': '812acaddb5b581c775d49cd25c9590603a054cd6',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling BoringSSL
# and whatever else without interference from each other.
#
# Note this revision should be updated with
# third_party/boringssl/roll_boringssl.py, not roll-dep.
'boringssl_revision': '414f69504d30d0848b69f6453ea7fb5e88004cb4',
'boringssl_revision': '23824fa0fed94f4660ffafb15aaea8b317f2c8a6',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling Fuchsia sdk
# and whatever else without interference from each other.
'fuchsia_version': 'version:17.20240120.1.1',
'fuchsia_version': 'version:18.20240215.1.1',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling google-toolbox-for-mac
# and whatever else without interference from each other.
@@ -355,11 +357,11 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling NaCl
# and whatever else without interference from each other.
'nacl_revision': '225f880e2de2a2d2b33fbdad55ca27eca3cdc103',
'nacl_revision': '48409922fc3877f7ab1e50435571aa8b4cf3dda9',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling freetype
# and whatever else without interference from each other.
'freetype_revision': '57617782464411201ce7bbc93b086c1b4d7d84a5',
'freetype_revision': '47574f7ea445c8bb751da0fa716424c9c29a6807',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling freetype
# and whatever else without interference from each other.
@@ -379,15 +381,15 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling catapult
# and whatever else without interference from each other.
'catapult_revision': '6fb0d6a41fa5b42b70e27f9268b03214431de51c',
'catapult_revision': '9cb2dc6f1b9c56d67fffbb7cf7bb7bb4ee156825',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling chromium_variations
# and whatever else without interference from each other.
'chromium_variations_revision': 'd0dcd8802c22c1ac4a7d112782a4c75f0c6ca8ee',
'chromium_variations_revision': '70b4eaba995ff3e59135b4e842bb247b40c64809',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling CrossBench
# and whatever else without interference from each other.
'crossbench_revision': '1983b3f517da56c35c91296467458f71ad5b9340',
'crossbench_revision': 'acbea986f40578f43c88239c78c797f61842e642',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling libFuzzer
# and whatever else without interference from each other.
@@ -395,11 +397,11 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling fuzztest
# and whatever else without interference from each other.
'fuzztest_revision': '12e7428ab0847b1d1dc6c4b89203adfd1f16a1ad',
'fuzztest_revision': '61d95200e7ece7d121cab26f0c39fbf392e6566e',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling devtools-frontend
# and whatever else without interference from each other.
'devtools_frontend_revision': 'e4d13b251b100b3fdd0c846b94453c0597bc251f',
'devtools_frontend_revision': '0b26a98de1edf1aaa557703354180d8787c769c1',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling libprotobuf-mutator
# and whatever else without interference from each other.
@@ -423,11 +425,11 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
'dawn_revision': '8917c648bdd68007c96b8ca9995533cc3ee995c2',
'dawn_revision': 'd1212225281e34b1076f3d1a2e9f4b4486b2d061',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
'quiche_revision': '0e39ce016ee1ec8271aa7216d547917c239db525',
'quiche_revision': 'efc574e1125251bc1c3195c0c183c843b4c0a1df',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling ios_webkit
# and whatever else without interference from each other.
@@ -443,7 +445,7 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling libavif
# and whatever else without interference from each other.
'libavif_revision': 'e170c9366090cdc389d5f47ee3c2d7db71d263bc',
'libavif_revision': 'e88a7535f890c710768cea89b68a1c092da32506',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling libavifinfo
# and whatever else without interference from each other.
@@ -451,11 +453,11 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling Speedometer v3.0
# and whatever else without interference from each other.
'speedometer_3.0_revision': '2ee210ca20767c949c4ff29bdffa1138eb0501fe',
'speedometer_3.0_revision': '7b1b81ee1319cae44c029fd8336d5e574f51e4e4',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling nearby
# and whatever else without interference from each other.
'nearby_revision': '4bdb5000ee7919724530cf89d50969e7b0ed58a7',
'nearby_revision': '6ad4bf75e2e917571b42201fa2b5f30f8ba534db',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling securemessage
# and whatever else without interference from each other.
@@ -467,7 +469,7 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
'cros_components_revision': 'ab7bdff32543991f52872c25cecf1f926702dfe3',
'cros_components_revision': 'caaac730221dc9e0a461e7eedcae4a35a46696bd',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
@@ -475,11 +477,11 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
'libcxxabi_revision': '9986707a5f2fc6d5d1ffa7f224a032bdd45c95fd',
'libcxxabi_revision': 'a7b3d968a3a923886fea64b424bd770e69dc4ea4',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
'libunwind_revision': 'f400fdb561d4416b59b8f8a33d8ec8b79da60495',
'libunwind_revision': '8bad7bd6ec30f94bce82f7cb5b58ecbd6ce02996',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling feed
# and whatever else without interference from each other.
@@ -491,7 +493,7 @@ vars = {
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling ffmpeg
# and whatever else without interference from each other.
'ffmpeg_revision': '17525de887d54b970ffdd421a0879c1db1952307',
'ffmpeg_revision': '7c1b0b524c639beeb25363b1d0809ebe5c6efe5e',
# Three lines of non-changing comments so that
# the commit queue can handle CLs rolling beto-core
# and whatever else without interference from each other.
@@ -499,10 +501,10 @@ vars = {
# If you change this, also update the libc++ revision in
# //buildtools/deps_revisions.gni.
'libcxx_revision': '28aa23ffb4c7344914a5b4ac7169f12e5a12333f',
'libcxx_revision': '834e97d73f13a166af65952fb681071eec87a2c4',
# GN CIPD package version.
'gn_version': 'git_revision:f99e015ac35f689cfdbf46e4eb174e5d2da78d8e',
'gn_version': 'git_revision:d4f94f9a6c25497b2ce0356bb99a8d202c8c1d32',
# ninja CIPD package version.
# https://chrome-infra-packages.appspot.com/p/infra/3pp/tools/ninja
@@ -588,7 +590,7 @@ deps = {
},
],
'dep_type': 'cipd',
'condition': '(host_os == "mac")',
'condition': 'checkout_mac',
},
'src/third_party/apache-mac-arm64': {
'packages': [
@@ -598,7 +600,7 @@ deps = {
},
],
'dep_type': 'cipd',
'condition': '(host_os == "mac")',
'condition': 'checkout_mac',
},
'src/third_party/apache-linux': {
@@ -620,7 +622,7 @@ deps = {
}
],
'dep_type': 'cipd',
'condition': '(host_os == "win")'
'condition': 'checkout_win'
},
'src/third_party/aosp_dalvik': {
@@ -649,7 +651,7 @@ deps = {
'packages': [
{
'package': 'chromium/android_webview/tools/cts_archive',
'version': 'dMHDxWyIpkzGNem_Z7ywDRj3Y2lUQKM7h4JT87_ejr8C',
'version': 'Tonx5t-WDQ4lYRaMNn3IEzzOeyaIgtQ0d1ZAv0lRlwEC',
},
],
'condition': 'checkout_android',
@@ -823,16 +825,16 @@ deps = {
'src/clank': {
'url': Var('chrome_git') + '/clank/internal/apps.git' + '@' +
'5563dfe6fe203c74d7bfff0f0d79c761eba5719a',
'8e19bf2e0e6c7fd728724293a1b5753e54a03667',
'condition': 'checkout_android and checkout_src_internal',
},
'src/docs/website': {
'url': Var('chromium_git') + '/website.git' + '@' + '7474472013397bdb177cda70099f6411a5bd8212',
'url': Var('chromium_git') + '/website.git' + '@' + '12d09e14812d8390213801bb31d08858a3378fcb',
},
'src/ios/third_party/earl_grey2/src': {
'url': Var('chromium_git') + '/external/github.com/google/EarlGrey.git' + '@' + 'c338a8cf3eea7c3ff8b88f835db1d2230a163252',
'url': Var('chromium_git') + '/external/github.com/google/EarlGrey.git' + '@' + '92f42b46a340462e12a28e6038d8b6b377a1c554',
'condition': 'checkout_ios',
},
@@ -985,7 +987,7 @@ deps = {
'packages': [
{
'package': 'chromium/third_party/androidx',
'version': 'BW2v6j8vjcVQrdX9fXmf686JtkLjxn-KCWhAE1XT_n4C',
'version': 'AW0sLOt-9fVfqmf3Sn6qDx60H7hL9fi2rxG9UcoHNdoC',
},
],
'condition': 'checkout_android',
@@ -1045,7 +1047,7 @@ deps = {
'packages': [
{
'package': 'chromium/third_party/android_build_tools/lint',
'version': 'X7sJxpJN0p6qi1dgpI9-UFA2YDe2O2A1kF0QZjBJpmYC',
'version': 'h9svnJ7PVwpadvxWMqfDD9NPFiJ4mbLravLcmBYueXgC',
},
],
'condition': 'checkout_android',
@@ -1056,7 +1058,7 @@ deps = {
'packages': [
{
'package': 'chromium/third_party/android_build_tools/manifest_merger',
'version': 'tFbjqslkduDT_-y8WEZlsl9iulzcm3mgienslcU71poC',
'version': 'tQIUabJkFuwAI7BH20b0nn5fKWSPAa_M8cbkzpIW0VkC',
},
],
'condition': 'checkout_android',
@@ -1100,7 +1102,7 @@ deps = {
Var('chromium_git') + '/external/github.com/chromium/content_analysis_sdk.git' + '@' + '9a408736204513e0e95dd2ab3c08de0d95963efc',
'src/third_party/dav1d/libdav1d':
Var('chromium_git') + '/external/github.com/videolan/dav1d.git' + '@' + '47107e384bd1dc25674acf04d000a8cdc6195234',
Var('chromium_git') + '/external/github.com/videolan/dav1d.git' + '@' + '7b15ca13752aac7f0a1c6a56e33fe64d1f7638d4',
'src/third_party/dawn':
Var('dawn_git') + '/dawn.git' + '@' + Var('dawn_revision'),
@@ -1125,7 +1127,7 @@ deps = {
Var('boringssl_git') + '/boringssl.git' + '@' + Var('boringssl_revision'),
'src/third_party/breakpad/breakpad':
Var('chromium_git') + '/breakpad/breakpad.git' + '@' + '62ecd463583d09eb7d15b1d410055f30b2c7bcb4',
Var('chromium_git') + '/breakpad/breakpad.git' + '@' + '6551ac3632eb7236642366f70a2eb865b87a3329',
'src/third_party/cast_core/public/src':
Var('chromium_git') + '/cast_core/public' + '@' + '71f51fd6fa45fac73848f65421081edd723297cd',
@@ -1160,7 +1162,7 @@ deps = {
# Tools used when building Chrome for Chrome OS. This affects both the Simple
# Chrome workflow, as well as the chromeos-chrome ebuild.
'src/third_party/chromite': {
'url': Var('chromium_git') + '/chromiumos/chromite.git' + '@' + 'a19bf14ba4d77c545b95d49ffd2e099eae5d6b5e',
'url': Var('chromium_git') + '/chromiumos/chromite.git' + '@' + 'e3bbb537f1b360f2bfd33543f13dffed1437a7cc',
'condition': 'checkout_chromeos',
},
@@ -1174,14 +1176,14 @@ deps = {
Var('chromium_git') + '/external/github.com/google/cpu_features.git' + '@' + '936b9ab5515dead115606559502e3864958f7f6e',
'src/third_party/cpuinfo/src':
Var('chromium_git') + '/external/github.com/pytorch/cpuinfo.git' + '@' + '76cc10d627add77922dc24521b332a055a4d6d77',
Var('chromium_git') + '/external/github.com/pytorch/cpuinfo.git' + '@' + '9484a6c590f831a30c1eec1311568b1a967a89dc',
'src/third_party/crc32c/src':
Var('chromium_git') + '/external/github.com/google/crc32c.git' + '@' + 'fa5ade41ee480003d9c5af6f43567ba22e4e17e6',
# For Linux and Chromium OS.
'src/third_party/cros_system_api': {
'url': Var('chromium_git') + '/chromiumos/platform2/system_api.git' + '@' + '12d5e386005a211570cfdf9849d2fa6a3b38594b',
'url': Var('chromium_git') + '/chromiumos/platform2/system_api.git' + '@' + 'd2229e09bc30d6ceab275991e26a9f3b1d5a74c0',
'condition': 'checkout_linux or checkout_chromeos',
},
@@ -1195,13 +1197,13 @@ deps = {
},
'src/third_party/depot_tools':
Var('chromium_git') + '/chromium/tools/depot_tools.git' + '@' + '6fc0c97ab284021b72e3bc962f7fa879ffcad65b',
Var('chromium_git') + '/chromium/tools/depot_tools.git' + '@' + '280bb93210cf6759498f8227ed439bb7845fce07',
'src/third_party/devtools-frontend/src':
Var('chromium_git') + '/devtools/devtools-frontend' + '@' + Var('devtools_frontend_revision'),
'src/third_party/devtools-frontend-internal': {
'url': Var('chrome_git') + '/devtools/devtools-internal.git' + '@' + 'fcb03cd96f26f08a173b609b952ea6bca095fa72',
'url': Var('chrome_git') + '/devtools/devtools-internal.git' + '@' + '137b308e648fc93655156c2337a2598bf4b00b66',
'condition': 'checkout_src_internal',
},
@@ -1209,7 +1211,7 @@ deps = {
Var('chromium_git') + '/chromium/dom-distiller/dist.git' + '@' + '199de96b345ada7c6e7e6ba3d2fa7a6911b8767d',
'src/third_party/eigen3/src':
Var('chromium_git') + '/external/gitlab.com/libeigen/eigen.git' + '@' + '454f89af9d6f3525b1df5f9ef9c86df58bf2d4d3',
Var('chromium_git') + '/external/gitlab.com/libeigen/eigen.git' + '@' + '7fd7a3f946e5ac152d28dad388cff8bfa1026925',
'src/third_party/emoji-metadata/src': {
'url': Var('chromium_git') + '/external/github.com/googlefonts/emoji-metadata' + '@' + '045f146fca682a836e01cd265171312bfb300e06',
@@ -1241,7 +1243,7 @@ deps = {
# Used for embedded builds. CrOS & Linux use the system version.
'src/third_party/fontconfig/src': {
'url': Var('chromium_git') + '/external/fontconfig.git' + '@' + '2fb3419a92156569bc1ec707401258c922cd0d99',
'url': Var('chromium_git') + '/external/fontconfig.git' + '@' + '14d466b30a8ab4a9d789977ed94f2c30e7209267',
'condition': 'checkout_linux',
},
@@ -1279,7 +1281,7 @@ deps = {
Var('chromium_git') + '/external/github.com/khaledhosny/ots.git' + '@' + Var('ots_revision'),
'src/third_party/libgav1/src':
Var('chromium_git') + '/codecs/libgav1.git' + '@' + '35fea10bfdb790cf131ae74a4ee346905f34dc3c',
Var('chromium_git') + '/codecs/libgav1.git' + '@' + 'd2f84e499e046281c4ded2d24d9186e2c54c01d8',
'src/third_party/google_toolbox_for_mac/src': {
'url': Var('chromium_git') + '/external/github.com/google/google-toolbox-for-mac.git' + '@' + Var('google_toolbox_for_mac_revision'),
@@ -1300,7 +1302,7 @@ deps = {
},
'src/third_party/cardboard/src' : {
'url': Var('chromium_git') + '/external/github.com/googlevr/cardboard/' + '@' + '5c9f3066dc14962d1dec9a32ec9d3668641c408d',
'url': Var('chromium_git') + '/external/github.com/googlevr/cardboard/' + '@' + 'c8842698f4a9d63cce865e7d6cb75773a4673496',
'condition': 'checkout_android',
},
@@ -1361,7 +1363,7 @@ deps = {
Var('chromium_git') + '/chromium/deps/hunspell_dictionaries.git' + '@' + '41cdffd71c9948f63c7ad36e1fb0ff519aa7a37e',
'src/third_party/icu':
Var('chromium_git') + '/chromium/deps/icu.git' + '@' + 'a622de35ac311c5ad390a7af80724634e5dc61ed',
Var('chromium_git') + '/chromium/deps/icu.git' + '@' + 'bad7ddbf921358177e56fd723c2f59f8041a370f',
'src/third_party/icu4j': {
'packages': [
@@ -1428,7 +1430,7 @@ deps = {
'packages': [
{
'package': 'chromium/third_party/kotlin_stdlib',
'version': '7f5xFu_YQrbg_vacQ5mMcUFIkMPpvM_mQ8QERRKYBvUC',
'version': '-uFeIws_FQzyqmgZlGL37ooRLAD8mwClD33O8rZwnTsC',
},
],
'condition': 'checkout_android',
@@ -1439,7 +1441,7 @@ deps = {
'packages': [
{
'package': 'chromium/third_party/kotlinc',
'version': '8nR_4qTn61NDCwL0G03LrNZzpgmsu5bbyRGior3fZX8C',
'version': 'ZrpoPpdqeDMIMIhXyd95yML-ZbNUIKDXSeYiWuxz2J0C',
},
],
'condition': 'checkout_android',
@@ -1459,7 +1461,7 @@ deps = {
Var('chromium_git') + '/external/libaddressinput.git' + '@' + 'e8712e415627f22d0b00ebee8db99547077f39bd',
'src/third_party/libaom/source/libaom':
Var('aomedia_git') + '/aom.git' + '@' + '1a72ea323d65e46eb90d08d492c04891abb91926',
Var('aomedia_git') + '/aom.git' + '@' + 'a2d599c9750e3027d3104770fe74ff5d5d012c13',
'src/third_party/libavif/src':
Var('chromium_git') + '/external/github.com/AOMediaCodec/libavif.git' + '@' + Var('libavif_revision'),
@@ -1529,7 +1531,7 @@ deps = {
},
'src/third_party/libvpx/source/libvpx':
Var('chromium_git') + '/webm/libvpx.git' + '@' + 'b95d17572629c676bdcfd535fb3990b9f6f8fb11',
Var('chromium_git') + '/webm/libvpx.git' + '@' + '3316c11240184851f8ce1c3061db8e22123cf9ed',
'src/third_party/libwebm/source':
Var('chromium_git') + '/webm/libwebm.git' + '@' + 'e4fbea0c9751ae8aa86629b197a28d8276a2b0da',
@@ -1538,7 +1540,7 @@ deps = {
Var('chromium_git') + '/webm/libwebp.git' + '@' + 'ca332209cb5567c9b249c86788cb2dbf8847e760',
'src/third_party/libyuv':
Var('chromium_git') + '/libyuv/libyuv.git' + '@' + '04821d1e7d60845525e8db55c7bcd41ef5be9406',
Var('chromium_git') + '/libyuv/libyuv.git' + '@' + 'a6a2ec654b1be1166b376476a7555c89eca0c275',
'src/third_party/lighttpd': {
'url': Var('chromium_git') + '/chromium/deps/lighttpd.git' + '@' + Var('lighttpd_revision'),
@@ -1573,7 +1575,7 @@ deps = {
},
'src/third_party/material_color_utilities/src': {
'url': Var('chromium_git') + '/external/github.com/material-foundation/material-color-utilities.git' + '@' + 'bec7bab60e6431201a82761ea4482b98b54c2af9',
'url': Var('chromium_git') + '/external/github.com/material-foundation/material-color-utilities.git' + '@' + '13434b50dcb64a482cc91191f8cf6151d90f5465',
},
'src/third_party/material_design_icons/src': {
@@ -1650,7 +1652,7 @@ deps = {
Var('chromium_git') + '/external/github.com/cisco/openh264' + '@' + '09a4f3ec842a8932341b195c5b01e141c8a16eb7',
'src/third_party/openscreen/src':
Var('chromium_git') + '/openscreen' + '@' + 'b70c552bedf189fc238e98f8f69e6c30e7925207',
Var('chromium_git') + '/openscreen' + '@' + 'f24b43fe39fde657f63030679c39b3c51a441586',
'src/third_party/openxr/src': {
'url': Var('chromium_git') + '/external/github.com/KhronosGroup/OpenXR-SDK' + '@' + '95fe35ffb383710a6e0567e958ead9a3b66e930c',
@@ -1661,7 +1663,7 @@ deps = {
Var('pdfium_git') + '/pdfium.git' + '@' + Var('pdfium_revision'),
'src/third_party/perfetto':
Var('android_git') + '/platform/external/perfetto.git' + '@' + '1e15d01da5d619ca617dcdd870efe3c35046a89c',
Var('android_git') + '/platform/external/perfetto.git' + '@' + '63b162fccc3b5d601b561e3218322fa3d8b2dcaf',
'src/third_party/perl': {
'url': Var('chromium_git') + '/chromium/deps/perl.git' + '@' + '8ef97ff3b7332e38e61b347a2fbed425a4617151',
@@ -1687,7 +1689,7 @@ deps = {
'packages': [
{
'package': 'fuchsia/third_party/qemu/linux-arm64',
'version': 'BpnoBb2d44_SOm9toN6Lju5a2RLGAc1TPUO6xyijoP8C'
'version': 'hOpuGIMj1FAtBWGDlXARkCm2srxY4enn8iI3AgrDna4C'
},
],
'condition': 'host_os == "linux" and checkout_fuchsia and checkout_fuchsia_for_arm64_host',
@@ -1695,13 +1697,13 @@ deps = {
},
'src/third_party/re2/src':
Var('chromium_git') + '/external/github.com/google/re2.git' + '@' + '826ad10e58a042faf57d7c329b0fd0a04b797e0b',
Var('chromium_git') + '/external/github.com/google/re2.git' + '@' + 'f9550c3f7207f946a45bbccd1814b12b136aae72',
'src/third_party/r8': {
'packages': [
{
'package': 'chromium/third_party/r8',
'version': 'K1NPmXz0aZCAGGtC5UESEmqwT5-x6QNNb0Jo0umsez4C',
'version': 'h_Nyj61z-U6meQbvpjcxE8NoosFmfjJ_VobRAFrNCjYC',
},
],
'condition': 'checkout_android',
@@ -1739,7 +1741,7 @@ deps = {
},
'src/third_party/ruy/src':
Var('chromium_git') + '/external/github.com/google/ruy.git' + '@' + 'cd7b92695b5d3f0c9ff65b865c2a1e19b99d766d',
Var('chromium_git') + '/external/github.com/google/ruy.git' + '@' + '587c2cf8b11d3c32fa26887063eda3171a3d353e',
'src/third_party/skia':
Var('skia_git') + '/skia.git' + '@' + Var('skia_revision'),
@@ -1751,7 +1753,7 @@ deps = {
Var('chromium_git') + '/external/github.com/google/snappy.git' + '@' + 'c9f9edf6d75bb065fa47468bf035e051a57bec7c',
'src/third_party/sqlite/src':
Var('chromium_git') + '/chromium/deps/sqlite.git' + '@' + 'a5270ae741714a5aad187ba8dcd8bddca39f791f',
Var('chromium_git') + '/chromium/deps/sqlite.git' + '@' + '0c0e07d7de6bac46cb28fbf6c576a4e13de15553',
'src/third_party/sqlite4java': {
'packages': [
@@ -1793,27 +1795,27 @@ deps = {
Var('chromium_git') + '/external/github.com/GoogleChromeLabs/text-fragments-polyfill.git' + '@' + 'c036420683f672d685e27415de0a5f5e85bdc23f',
'src/third_party/tflite/src':
Var('chromium_git') + '/external/github.com/tensorflow/tensorflow.git' + '@' + '296f1e3cce03308c7fd5cdc7a76fbc3e41ec5214',
Var('chromium_git') + '/external/github.com/tensorflow/tensorflow.git' + '@' + 'e65a2c7a59555735b58cea92e1571e7ced1b6bbf',
'src/third_party/turbine': {
'packages': [
{
'package': 'chromium/third_party/turbine',
'version': 'KfCqNpZ5XxbfuKiIsjeMWFX-6aJc5WN37x9weHyVDIkC',
'version': 's-hdujub30RR2mH9Qf7pHv6h9uNGEiYVs6W1VXWeEe8C',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
'src/third_party/vulkan-deps': '{chromium_git}/vulkan-deps@c00c99b8e979ca1b1eba221a60cb1e1d3b12f956',
'src/third_party/vulkan-deps': '{chromium_git}/vulkan-deps@9c80a66222a9f2f4f02b80b383bb378bfc236559',
'src/third_party/vulkan_memory_allocator':
Var('chromium_git') + '/external/github.com/GPUOpen-LibrariesAndSDKs/VulkanMemoryAllocator.git' + '@' + '56300b29fbfcc693ee6609ddad3fdd5b7a449a21',
# Display server protocol for Linux.
'src/third_party/wayland/src': {
'url': Var('chromium_git') + '/external/anongit.freedesktop.org/git/wayland/wayland.git' + '@' + 'af7f44122127b86a8c74cb7432909180f4899eaa',
'url': Var('chromium_git') + '/external/anongit.freedesktop.org/git/wayland/wayland.git' + '@' + 'c35d1a3d1c0a1735afe5eb227cb826faa878ec19',
'condition': 'checkout_linux',
},
@@ -1843,10 +1845,10 @@ deps = {
Var('chromium_git') + '/external/khronosgroup/webgl.git' + '@' + 'f4bf599a8b575df685c31d9c4729a70a04e377ed',
'src/third_party/webgpu-cts/src':
Var('chromium_git') + '/external/github.com/gpuweb/cts.git' + '@' + 'e082b08475761a2ba6a3349dfea72f704c8b68d4',
Var('chromium_git') + '/external/github.com/gpuweb/cts.git' + '@' + '8a9294d00391a8d3dbcdb3091308f9b3034b384e',
'src/third_party/webrtc':
Var('webrtc_git') + '/src.git' + '@' + 'be2786cd2383b7ec5d158add166275d19e246763',
Var('webrtc_git') + '/src.git' + '@' + '41b1493ddb5d98e9125d5cb002fd57ce76ebd8a7',
# Wuffs' canonical repository is at github.com/google/wuffs, but we use
# Skia's mirror of Wuffs, the same as in upstream Skia's DEPS file.
@@ -1871,7 +1873,7 @@ deps = {
},
'src/third_party/xnnpack/src':
Var('chromium_git') + '/external/github.com/google/XNNPACK.git' + '@' + 'a68aa0a24b0d3e1c75f2f7c0915b70121cee0470',
Var('chromium_git') + '/external/github.com/google/XNNPACK.git' + '@' + 'd5d373fee053b4823f37611f88a51d6c8e23d42a',
'src/tools/page_cycler/acid3':
Var('chromium_git') + '/chromium/deps/acid3.git' + '@' + 'a926d0a32e02c4c03ae95bb798e6c780e0e184ba',
@@ -1890,13 +1892,13 @@ deps = {
},
'src/third_party/zstd/src':
Var('chromium_git') + '/external/github.com/facebook/zstd.git' + '@' + '050fec5c378d676fede8b2171ec5e84f6afa1504',
Var('chromium_git') + '/external/github.com/facebook/zstd.git' + '@' + '621a263fb2e6c2175fbd489e5d77ee8038baa2b2',
'src/tools/skia_goldctl/linux': {
'packages': [
{
'package': 'skia/tools/goldctl/linux-amd64',
'version': '407H-TbIdlUjRbGWaMLTbSuhauPqvPICdysGuqJvZwUC',
'version': 'zK5gXUdYtOJO_5L0VqpL13_iPtatoApMRsbAJ-AObycC',
},
],
'dep_type': 'cipd',
@@ -1906,7 +1908,7 @@ deps = {
'packages': [
{
'package': 'skia/tools/goldctl/windows-amd64',
'version': '14DPIsHsHs60_8PzIoLPiLesYnsN_0qV7RUmyNCr3zMC',
'version': 'fWJiw3sBoMGqR2SS2otkCsOmnqK4iXZUWzTVfqw0cssC',
},
],
'dep_type': 'cipd',
@@ -1917,7 +1919,7 @@ deps = {
'packages': [
{
'package': 'skia/tools/goldctl/mac-amd64',
'version': 'lkI4UMXstA7DR9LqFykhbBB0sT-pbajdPVIN8nO1xCwC',
'version': 'I77LRdzh6aOopDPydG6LuPfDh6BbH4IFqWH8WWesWlMC',
},
],
'dep_type': 'cipd',
@@ -1928,7 +1930,7 @@ deps = {
'packages': [
{
'package': 'skia/tools/goldctl/mac-arm64',
'version': 'lhItSTy1WLT7ZDUaklin1sNQ2vdQFPwVcEKC5gRty-4C',
'version': 'JRekXzEdC8R2yKoqGJvHhZ516qC1pJwyHAxOuqTyDREC',
},
],
'dep_type': 'cipd',
@@ -1958,7 +1960,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/apps/eche_app/app',
'version': '21ioGwVFXWwczZxLxJkLx5Ip0yA9YW9K5gjEdV_NO3gC',
'version': 'DnPrMxwYi3z-CBmheuwa4UpmeI5g0AUOWlPLCPDLbA4C',
},
],
'condition': 'checkout_chromeos and checkout_src_internal',
@@ -1969,7 +1971,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/apps/help_app/app',
'version': 'T2L4eCZoLBfD5jbAfm6CtGFubQrFsh8hBTH_gG6UyewC',
'version': 'JwGf5qZw7PgrQ4euqRl9iGhcEshUiYD1QgEUXQ6yXQUC',
},
],
'condition': 'checkout_chromeos and checkout_src_internal',
@@ -1980,7 +1982,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/apps/media_app/app',
'version': 'lB6ZFaZwsZsfLvlQn7y4X3B8129MDO3G2A5iBrhuUnQC',
'version': 's5jT7WEmP1U58wei6ziA4mnu0N_9GwpRxpPLHlJIcssC',
},
],
'condition': 'checkout_chromeos and checkout_src_internal',
@@ -2013,7 +2015,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/apps/projector_app/app',
'version': 'je0l3f95yPXSEJdiw4B20oNpQ4qtxwkdWYRdPDyt3MUC',
'version': 'PN-QPiUgJg3wDh9RD3r6W75wsH8HV-1itFHINs0IRBIC',
},
],
'condition': 'checkout_chromeos and checkout_src_internal',
@@ -2449,7 +2451,7 @@ deps = {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/com_google_android_gms_play_services_base',
'version': 'version:2@18.0.1.cr1',
'version': 'version:2@18.1.0.cr1',
},
],
'condition': 'checkout_android',
@@ -2610,6 +2612,28 @@ deps = {
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/com_google_android_gms_play_services_tflite_impl': {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/com_google_android_gms_play_services_tflite_impl',
'version': 'version:2@16.0.1.cr1',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/com_google_android_gms_play_services_tflite_java': {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/com_google_android_gms_play_services_tflite_java',
'version': 'version:2@16.0.1.cr1',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/com_google_android_gms_play_services_vision': {
'packages': [
{
@@ -3369,6 +3393,28 @@ deps = {
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/org_jetbrains_kotlin_kotlin_android_extensions_runtime': {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/org_jetbrains_kotlin_kotlin_android_extensions_runtime',
'version': 'version:2@1.9.22.cr1',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/org_jetbrains_kotlin_kotlin_parcelize_runtime': {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/org_jetbrains_kotlin_kotlin_parcelize_runtime',
'version': 'version:2@1.9.22.cr1',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/org_jetbrains_kotlin_kotlin_stdlib_jdk7': {
'packages': [
{
@@ -3391,6 +3437,17 @@ deps = {
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/org_jetbrains_kotlinx_atomicfu_jvm': {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/org_jetbrains_kotlinx_atomicfu_jvm',
'version': 'version:2@0.23.2.cr1',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/org_jetbrains_kotlinx_kotlinx_coroutines_android': {
'packages': [
{
@@ -3710,6 +3767,17 @@ deps = {
'dep_type': 'cipd',
},
'src/third_party/android_deps/libs/org_tensorflow_tensorflow_lite_api': {
'packages': [
{
'package': 'chromium/third_party/android_deps/libs/org_tensorflow_tensorflow_lite_api',
'version': 'version:2@2.10.0.cr1',
},
],
'condition': 'checkout_android',
'dep_type': 'cipd',
},
# === ANDROID_DEPS Generated Code End ===
'src/tools/resultdb': {
@@ -3761,7 +3829,7 @@ deps = {
# Dependencies from src_internal
'src/chromeos/assistant/internal': {
'url': Var('chrome_git') + '/chrome/assistant.git' + '@' +
'a2f5b174dbc4f5a6ceb9757e9f292ff17015d7ad',
'aebc822b20c2e472e3bb7e44541f06032b0dd0e3',
'condition': 'checkout_src_internal and checkout_chromeos',
},
@@ -3828,15 +3896,21 @@ deps = {
'condition': 'checkout_src_internal',
},
'src/chrome/browser/platform_experience/win': {
'url': Var('chrome_git') + '/chrome/browser/platform_experience/win.git' + '@' +
'6383a08573bf06dbcd51da6aceffc86c59cc25f4',
'condition': 'checkout_src_internal',
},
'src/chrome/browser/resources/chromeos/quickoffice': {
'url': Var('chrome_git') + '/quickoffice/crx.git' + '@' +
'79e797d69d4675a2f0ef916dbb65457fe9485fc9',
'82b2a09bf9550c7435a774a6261e6736b787468f',
'condition': '(checkout_chromeos or checkout_linux) and checkout_src_internal',
},
'src/chrome/browser/resources/settings_internal': {
'src/chrome/browser/resources/settings/internal': {
'url': Var('chrome_git') + '/chrome/browser/resources/settings_internal.git' + '@' +
'5d6316b2434986e6b073e1d24585578bb27da451', # from svn revision 41419
'c8a62277e90b0e4cea284f3ba188d5e1cbfc07ab', # from svn revision 41419
'condition': 'checkout_src_internal',
},
@@ -3850,7 +3924,18 @@ deps = {
'packages' : [
{
'package': 'chromeos_internal/inputs/orca',
'version': 'idj872EVym3y6rYM9KjpQ6G60oEODlVB2hombAuFCbIC'
'version': 'ex3HfXjUIRsuf6fz72kUP11zauou3laDZ_sumsrLL3wC'
}
],
'condition': 'checkout_chromeos and checkout_src_internal',
'dep_type': 'cipd',
},
'src/chrome/browser/resources/chromeos/seal/resources': {
'packages' : [
{
'package': 'chromeos_internal/inputs/seal',
'version': '11AdGL1RBEo2LflLT5Vc8Q3vBfjsHQAuH5jAhUBxL9QC'
}
],
'condition': 'checkout_chromeos and checkout_src_internal',
@@ -3949,13 +4034,13 @@ deps = {
'src/components/optimization_guide/internal': {
'url': Var('chrome_git') + '/chrome/components/optimization_guide.git' + '@' +
'69f890a1800e03a26267a4e72a051a7c121082f1',
'0cee66b28caba679736c2e63ccb3a76e99f941fa',
'condition': 'checkout_src_internal',
},
'src/components/plus_addresses/resources/internal': {
'url': Var('chrome_git') + '/chrome/components/plus_addresses/resources.git' + '@' +
'61a9cd635c8317c7c4be901936629e12b2bdea3c',
'4f595c87a18088bf7c43613ebae849f23559f725',
'condition': 'checkout_src_internal',
},
@@ -4009,7 +4094,7 @@ deps = {
'src/ios_internal': {
'url': Var('chrome_git') + '/chrome/ios_internal.git' + '@' +
'448586e33e09467fc54287f4ac6149426bc250b2',
'6c5287d7adda0ea7efec7575cc51d6df4c3ac2b5',
'condition': 'checkout_ios and checkout_src_internal',
},
@@ -4027,7 +4112,7 @@ deps = {
'src/remoting/internal': {
'url': Var('chrome_git') + '/chrome/remoting/internal.git' + '@' +
'55265d75e1b3025a2fdcc317397d0fc5a53c0162',
'7a922bc6f3b96a6aaf7eb741df3492248a842aea',
'condition': 'checkout_src_internal',
},
@@ -4085,7 +4170,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/assistant/libassistant/libassistant_cros_device/x64/internal',
'version': 'w-9I4ZQe75ope7clwip3vo3wXzm-hDaF9qEDmzi8DNsC',
'version': 'ONBUvln4HGgBn4B4uwD_GLKwHKk4XtyBTTcb0VqLqBUC',
},
],
'condition': 'checkout_src_internal and checkout_chromeos',
@@ -4096,7 +4181,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/assistant/libassistant/libassistant_cros_device/arm64/internal',
'version': 'L2pNmE15We5ZW21b6dgA3i6mZ_ELXcg_GIZrJQSa5yUC',
'version': '8tJ92R7a1cME_3Lb8dY17jMPhIZmJKGn74jRcvBwDA8C',
},
],
'condition': 'checkout_src_internal and checkout_chromeos',
@@ -4107,7 +4192,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/assistant/libassistant/libassistant_cros_device/arm/internal',
'version': 'ZdMISVwM_Me_supqNeYFtIoqPR9ZnD9TWghBQs-EZgQC',
'version': 'HWbMkz4ukSFB4WDMHQokyqvncNrDQdykTNAFPxMiXSYC',
},
],
'condition': 'checkout_src_internal and checkout_chromeos',
@@ -4118,7 +4203,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/assistant/libassistant/libassistant_cros_glinux/x64/internal',
'version': 'ymOO8fysuXlIs5oqwgsZ6jFP1QDPzx4TYnzwgmn77a4C',
'version': 'CHE67HLb-6imPXB3fBp_A_eFs2kf_lg-sU5xH2q_bmYC',
},
],
'condition': 'checkout_src_internal and checkout_chromeos',
@@ -4129,7 +4214,7 @@ deps = {
'packages': [
{
'package': 'chromeos_internal/assistant/libassistant/fake_s3_server_cros_glinux/x64/internal',
'version': 'oldnb3_NMrgx9lBYJD43rCLL0TAiVBMJMbpFlgXnOfIC',
'version': 'IRweCdbYxKDjyJ0cm9uNuSdHydlV75Nrw3eUboDEAPYC',
},
],
'condition': 'checkout_src_internal and checkout_chromeos',
@@ -4147,6 +4232,28 @@ deps = {
'dep_type': 'cipd',
},
'src/third_party/screen-ai/macos_amd64': {
'packages': [
{
'package': 'chromium/third_party/screen-ai/mac-amd64',
'version': Var('screen_ai_macos_amd64'),
},
],
'condition': 'checkout_mac',
'dep_type': 'cipd',
},
'src/third_party/screen-ai/macos_arm64': {
'packages': [
{
'package': 'chromium/third_party/screen-ai/mac-arm64',
'version': Var('screen_ai_macos_arm64'),
},
],
'condition': 'checkout_mac',
'dep_type': 'cipd',
},
'src/third_party/soda': {
'packages': [
{
@@ -4979,7 +5086,7 @@ hooks = [
{
'name': 'Fetch WPR archive files',
'pattern': '.',
'condition': 'checkout_android and (checkout_wpr_archives or checkout_src_internal)',
'condition': 'checkout_android and checkout_wpr_archives',
'action': [ 'python3',
'src/chrome/test/data/android/manage_wpr_archives.py',
'download',
@@ -5367,7 +5474,8 @@ hooks = [
'condition': 'checkout_pgo_profiles and checkout_lacros_sdk',
'action': [ 'python3',
'src/tools/update_pgo_profiles.py',
'--target=lacros-arm',
# Use arm64 profile.
'--target=lacros-arm64',
'update',
'--gs-url-base=chromium-optimization-profiles/pgo_profiles',
],
naiveproxy/src/base/BUILD.gn
+46 -12
View File
@@ -42,6 +42,11 @@ import("//build/timestamp.gni")
import("//build/util/process_version.gni")
import("//build_overrides/build.gni")
if (is_ios) {
# Used to access ios_is_app_extension variable definition.
import("//build/config/ios/ios_sdk.gni")
}
if (is_mac) {
# Used to generate fuzzer corpus :base_mach_port_rendezvous_convert_corpus.
import("//third_party/protobuf/proto_library.gni")
@@ -285,7 +290,6 @@ component("base") {
"containers/lru_cache.h",
"containers/map_util.h",
"containers/small_map.h",
"containers/span.h",
"containers/stack.h",
"containers/unique_ptr_adapters.h",
"containers/util.h",
@@ -405,6 +409,7 @@ component("base") {
"memory/platform_shared_memory_mapper.h",
"memory/platform_shared_memory_region.cc",
"memory/platform_shared_memory_region.h",
"memory/protected_memory.h",
"memory/ptr_util.h",
"memory/raw_ptr.h",
"memory/raw_ptr_asan_bound_arg_tracker.cc",
@@ -488,8 +493,6 @@ component("base") {
"metrics/histogram_macros_local.h",
"metrics/histogram_samples.cc",
"metrics/histogram_samples.h",
"metrics/histogram_shared_memory.cc",
"metrics/histogram_shared_memory.h",
"metrics/histogram_snapshot_manager.cc",
"metrics/histogram_snapshot_manager.h",
"metrics/metrics_hashes.cc",
@@ -518,6 +521,7 @@ component("base") {
"metrics/user_metrics_action.h",
"no_destructor.h",
"not_fatal_until.h",
"notimplemented.h",
"notreached.h",
"observer_list.h",
"observer_list_internal.cc",
@@ -782,9 +786,6 @@ component("base") {
"task/thread_pool/environment_config.h",
"task/thread_pool/job_task_source.cc",
"task/thread_pool/job_task_source.h",
"task/thread_pool/job_task_source_interface.h",
"task/thread_pool/job_task_source_old.cc",
"task/thread_pool/job_task_source_old.h",
"task/thread_pool/pooled_parallel_task_runner.cc",
"task/thread_pool/pooled_parallel_task_runner.h",
"task/thread_pool/pooled_sequenced_task_runner.cc",
@@ -812,6 +813,8 @@ component("base") {
"task/thread_pool/thread_group.h",
"task/thread_pool/thread_group_impl.cc",
"task/thread_pool/thread_group_impl.h",
"task/thread_pool/thread_group_semaphore.cc",
"task/thread_pool/thread_group_semaphore.h",
"task/thread_pool/thread_group_worker_delegate.cc",
"task/thread_pool/thread_group_worker_delegate.h",
"task/thread_pool/thread_pool_impl.cc",
@@ -916,6 +919,8 @@ component("base") {
"trace_event/heap_profiler_allocation_context_tracker.h",
"trace_event/memory_allocator_dump_guid.cc",
"trace_event/memory_allocator_dump_guid.h",
"trace_event/named_trigger.cc",
"trace_event/named_trigger.h",
"trace_event/trace_id_helper.cc",
"trace_event/trace_id_helper.h",
"traits_bag.h",
@@ -927,6 +932,7 @@ component("base") {
"types/expected_macros.h",
"types/fixed_array.h",
"types/id_type.h",
"types/is_complete.h",
"types/is_instantiation.h",
"types/optional_ref.h",
"types/optional_util.h",
@@ -1056,6 +1062,7 @@ component("base") {
"//base/third_party/dynamic_annotations",
"//build:blink_buildflags",
"//build:branding_buildflags",
"//build:ios_buildflags",
"//build/config/compiler:compiler_buildflags",
"//third_party/modp_b64",
]
@@ -1086,6 +1093,7 @@ component("base") {
":orderfile_buildflags",
":power_monitor_buildflags",
":profiler_buildflags",
":protected_memory_buildflags",
":rust_buildflags",
":sanitizer_buildflags",
":synchronization_buildflags",
@@ -1197,7 +1205,7 @@ component("base") {
deps += [
"//third_party/ashmem",
"//third_party/cpu_features:ndk_compat",
"//third_party/jni_zero:jni_zero_utils",
"//third_party/jni_zero:jni_zero",
]
# Needs to be a public config so that dependent targets link against it as
@@ -1255,6 +1263,9 @@ component("base") {
"android/jni_android.h",
"android/jni_array.cc",
"android/jni_array.h",
"android/jni_bytebuffer.cc",
"android/jni_bytebuffer.h",
"android/jni_conversions.cc",
"android/jni_registrar.cc",
"android/jni_registrar.h",
"android/jni_string.cc",
@@ -1267,14 +1278,17 @@ component("base") {
"android/library_loader/library_loader_hooks.h",
"android/native_uma_recorder.cc",
"android/scoped_java_ref.h",
"android/token_android.cc",
"android/token_android.h",
"android/trace_event_binding.cc",
"android/trace_event_binding.h",
]
deps += [
":base_jni",
":process_launcher_jni",
"//build:robolectric_buildflags",
]
public_deps += [ "//third_party/jni_zero:jni_zero_utils" ]
public_deps += [ "//third_party/jni_zero:jni_zero" ]
} # is_android || is_robolectric
# Chromeos.
@@ -1307,7 +1321,6 @@ component("base") {
"files/dir_reader_posix.h",
"files/file_path_watcher_stub.cc", # See crbug.com/851641.
"files/file_posix.cc",
"files/file_util_fuchsia.cc",
"files/memory_mapped_file_posix.cc",
"fuchsia/default_job.cc",
"fuchsia/default_job.h",
@@ -1603,6 +1616,10 @@ component("base") {
sources += [
"memory/discardable_shared_memory.cc",
"memory/discardable_shared_memory.h",
"memory/shared_memory_switch.cc",
"memory/shared_memory_switch.h",
"metrics/histogram_shared_memory.cc",
"metrics/histogram_shared_memory.h",
"process/kill.cc",
"process/kill.h",
"process/launch.cc",
@@ -1676,6 +1693,7 @@ component("base") {
"memory/page_size_win.cc",
"memory/platform_shared_memory_mapper_win.cc",
"memory/platform_shared_memory_region_win.cc",
"memory/protected_memory_win.cc",
"message_loop/message_pump_win.cc",
"message_loop/message_pump_win.h",
"moving_window.h",
@@ -2029,7 +2047,6 @@ component("base") {
sources += [
"base_paths_ios.h",
"base_paths_ios.mm",
"critical_closure_internal_ios.mm",
"ios/block_types.h",
"ios/crb_protocol_observers.h",
"ios/crb_protocol_observers.mm",
@@ -2040,8 +2057,6 @@ component("base") {
"ios/ns_error_util.h",
"ios/ns_error_util.mm",
"ios/ns_range.h",
"ios/scoped_critical_action.h",
"ios/scoped_critical_action.mm",
"native_library_ios.mm",
"power_monitor/power_monitor_device_source_ios.mm",
"process/process_metrics_ios.cc",
@@ -2050,6 +2065,14 @@ component("base") {
"system/sys_info_ios.mm",
]
if (!ios_is_app_extension) {
sources += [
"critical_closure_internal_ios.mm",
"ios/scoped_critical_action.h",
"ios/scoped_critical_action.mm",
]
}
if (use_blink) {
sources += [
"files/file_path_watcher_kqueue.cc",
@@ -2453,6 +2476,17 @@ buildflag_header("orderfile_buildflags") {
]
}
# Build flags for ProtectedMemory
buildflag_header("protected_memory_buildflags") {
header = "protected_memory_buildflags.h"
header_dir = "base/memory"
# Currently Protected Memory is only supported on Windows.
protected_memory_enabled = is_win
flags = [ "PROTECTED_MEMORY_ENABLED=$protected_memory_enabled" ]
}
buildflag_header("synchronization_buildflags") {
header = "synchronization_buildflags.h"
header_dir = "base/synchronization"
naiveproxy/src/base/OWNERS
+2
View File
@@ -41,6 +41,8 @@ per-file dcheck*=olivierli@chromium.org
per-file dcheck*=pbos@chromium.org
per-file logging*=olivierli@chromium.org
per-file logging*=pbos@chromium.org
per-file notimplemented.h=olivierli@chromium.org
per-file notimplemented.h=pbos@chromium.org
per-file notreached.h=olivierli@chromium.org
per-file notreached.h=pbos@chromium.org
naiveproxy/src/base/allocator/partition_alloc_features.cc
+72 -10
View File
@@ -8,6 +8,7 @@
#include "base/allocator/partition_allocator/src/partition_alloc/partition_alloc_base/time/time.h"
#include "base/allocator/partition_allocator/src/partition_alloc/partition_alloc_buildflags.h"
#include "base/allocator/partition_allocator/src/partition_alloc/partition_root.h"
#include "base/allocator/partition_allocator/src/partition_alloc/shim/allocator_shim_dispatch_to_noop_on_free.h"
#include "base/allocator/partition_allocator/src/partition_alloc/thread_cache.h"
#include "base/base_export.h"
#include "base/feature_list.h"
@@ -118,11 +119,6 @@ BASE_FEATURE(kPartitionAllocSchedulerLoopQuarantine,
const base::FeatureParam<int> kPartitionAllocSchedulerLoopQuarantineCapacity{
&kPartitionAllocSchedulerLoopQuarantine,
"PartitionAllocSchedulerLoopQuarantineCapacity", 0};
// Scheduler Loop Quarantine's capacity count.
const base::FeatureParam<int>
kPartitionAllocSchedulerLoopQuarantineCapacityCount{
&kPartitionAllocSchedulerLoopQuarantine,
"PartitionAllocSchedulerLoopQuarantineCapacityCount", 1024};
BASE_FEATURE(kPartitionAllocZappingByFreeFlags,
"PartitionAllocZappingByFreeFlags",
@@ -178,19 +174,29 @@ constexpr FeatureParam<BackupRefPtrMode>::Option kBackupRefPtrModeOptions[] = {
};
const base::FeatureParam<BackupRefPtrMode> kBackupRefPtrModeParam{
&kPartitionAllocBackupRefPtr, "brp-mode", BackupRefPtrMode::kEnabled,
&kBackupRefPtrModeOptions};
&kPartitionAllocBackupRefPtr, "brp-mode",
BackupRefPtrMode::kEnabledInSameSlotMode, &kBackupRefPtrModeOptions};
BASE_FEATURE(kPartitionAllocMemoryTagging,
"PartitionAllocMemoryTagging",
FEATURE_DISABLED_BY_DEFAULT);
#if BUILDFLAG(USE_FULL_MTE)
FEATURE_ENABLED_BY_DEFAULT
#else
FEATURE_DISABLED_BY_DEFAULT
#endif
);
constexpr FeatureParam<MemtagMode>::Option kMemtagModeOptions[] = {
{MemtagMode::kSync, "sync"},
{MemtagMode::kAsync, "async"}};
const base::FeatureParam<MemtagMode> kMemtagModeParam{
&kPartitionAllocMemoryTagging, "memtag-mode", MemtagMode::kAsync,
&kPartitionAllocMemoryTagging, "memtag-mode",
#if BUILDFLAG(USE_FULL_MTE)
MemtagMode::kSync,
#else
MemtagMode::kAsync,
#endif
&kMemtagModeOptions};
constexpr FeatureParam<MemoryTaggingEnabledProcesses>::Option
@@ -202,7 +208,11 @@ constexpr FeatureParam<MemoryTaggingEnabledProcesses>::Option
const base::FeatureParam<MemoryTaggingEnabledProcesses>
kMemoryTaggingEnabledProcessesParam{
&kPartitionAllocMemoryTagging, "enabled-processes",
#if BUILDFLAG(USE_FULL_MTE)
MemoryTaggingEnabledProcesses::kAllProcesses,
#else
MemoryTaggingEnabledProcesses::kBrowserOnly,
#endif
&kMemoryTaggingEnabledProcessesOptions};
BASE_FEATURE(kKillPartitionAllocMemoryTagging,
@@ -212,7 +222,13 @@ BASE_FEATURE(kKillPartitionAllocMemoryTagging,
BASE_EXPORT BASE_DECLARE_FEATURE(kPartitionAllocPermissiveMte);
BASE_FEATURE(kPartitionAllocPermissiveMte,
"PartitionAllocPermissiveMte",
FEATURE_ENABLED_BY_DEFAULT);
#if BUILDFLAG(USE_FULL_MTE)
// We want to actually crash if USE_FULL_MTE is enabled.
FEATURE_DISABLED_BY_DEFAULT
#else
FEATURE_ENABLED_BY_DEFAULT
#endif
);
const base::FeatureParam<bool> kBackupRefPtrAsanEnableDereferenceCheckParam{
&kPartitionAllocBackupRefPtr, "asan-enable-dereference-check", true};
@@ -437,5 +453,51 @@ BASE_FEATURE(kUsePoolOffsetFreelists,
base::FEATURE_DISABLED_BY_DEFAULT);
#endif
BASE_FEATURE(kPartitionAllocMakeFreeNoOpOnShutdown,
"PartitionAllocMakeFreeNoOpOnShutdown",
FEATURE_DISABLED_BY_DEFAULT);
constexpr FeatureParam<WhenFreeBecomesNoOp>::Option
kPartitionAllocMakeFreeNoOpOnShutdownOptions[] = {
{
WhenFreeBecomesNoOp::kBeforeShutDownThreads,
"before-shutdown-threads",
},
{
WhenFreeBecomesNoOp::kInShutDownThreads,
"in-shutdown-threads",
},
{
WhenFreeBecomesNoOp::kAfterShutDownThreads,
"after-shutdown-threads",
},
};
const base::FeatureParam<WhenFreeBecomesNoOp>
kPartitionAllocMakeFreeNoOpOnShutdownParam{
&kPartitionAllocMakeFreeNoOpOnShutdown, "callsite",
WhenFreeBecomesNoOp::kBeforeShutDownThreads,
&kPartitionAllocMakeFreeNoOpOnShutdownOptions};
void MakeFreeNoOp(WhenFreeBecomesNoOp callsite) {
CHECK(base::FeatureList::GetInstance());
// Ignoring `free()` during Shutdown would allow developers to introduce new
// dangling pointers. So we want to avoid ignoring free when it is enabled.
// Note: For now, the DanglingPointerDetector is only enabled on 5 bots, and
// on linux non-official configuration.
// TODO(b/40802063): Reconsider this decision after the experiment.
#if BUILDFLAG(ENABLE_DANGLING_RAW_PTR_CHECKS)
if (base::FeatureList::IsEnabled(features::kPartitionAllocDanglingPtr)) {
return;
}
#endif // BUILDFLAG(ENABLE_DANGLING_RAW_PTR_CHECKS)
#if BUILDFLAG(USE_ALLOCATOR_SHIM)
if (base::FeatureList::IsEnabled(kPartitionAllocMakeFreeNoOpOnShutdown) &&
kPartitionAllocMakeFreeNoOpOnShutdownParam.Get() == callsite) {
allocator_shim::InsertNoOpOnFreeAllocatorShimOnShutDown();
}
#endif // BUILDFLAG(USE_ALLOCATOR_SHIM)
}
} // namespace features
} // namespace base
naiveproxy/src/base/allocator/partition_alloc_features.h
+17 -3
View File
@@ -75,9 +75,6 @@ BASE_EXPORT BASE_DECLARE_FEATURE(kPartitionAllocSchedulerLoopQuarantine);
// Scheduler Loop Quarantine's capacity in bytes.
extern const BASE_EXPORT base::FeatureParam<int>
kPartitionAllocSchedulerLoopQuarantineCapacity;
// Scheduler Loop Quarantine's capacity count.
extern const BASE_EXPORT base::FeatureParam<int>
kPartitionAllocSchedulerLoopQuarantineCapacityCount;
BASE_EXPORT BASE_DECLARE_FEATURE(kPartitionAllocZappingByFreeFlags);
#endif // BUILDFLAG(USE_PARTITION_ALLOC_AS_MALLOC)
@@ -129,6 +126,23 @@ enum class BucketDistributionMode : uint8_t {
kDenser,
};
// Parameter for 'kPartitionAllocMakeFreeNoOpOnShutdown' feature which
// controls when free() becomes a no-op during Shutdown()
enum class WhenFreeBecomesNoOp {
// Allocator is inserted either before, in, or after shutdown threads
kBeforeShutDownThreads,
kInShutDownThreads,
kAfterShutDownThreads,
};
// Inserts a no-op on 'free()' allocator shim at the front of the
// dispatch chain if called from the appropriate callsite.
BASE_EXPORT void MakeFreeNoOp(WhenFreeBecomesNoOp callsite);
BASE_EXPORT BASE_DECLARE_FEATURE(kPartitionAllocMakeFreeNoOpOnShutdown);
extern const BASE_EXPORT base::FeatureParam<WhenFreeBecomesNoOp>
kPartitionAllocMakeFreeNoOpOnShutdownParam;
BASE_EXPORT BASE_DECLARE_FEATURE(kPartitionAllocBackupRefPtr);
extern const BASE_EXPORT base::FeatureParam<BackupRefPtrEnabledProcesses>
kBackupRefPtrEnabledProcessesParam;
naiveproxy/src/base/allocator/partition_alloc_support.cc
+6 -8
View File
@@ -4,7 +4,6 @@
#include "base/allocator/partition_alloc_support.h"
#include <base/ranges/algorithm.h>
#include <array>
#include <cinttypes>
#include <cstdint>
@@ -364,8 +363,11 @@ std::map<std::string, std::string> ProposeSyntheticFinchTrials() {
#if BUILDFLAG(IS_ANDROID)
BootloaderOverride bootloader_override = GetBootloaderOverride();
partition_alloc::TagViolationReportingMode reporting_mode =
allocator_shim::internal::PartitionAllocMalloc::Allocator()
->memory_tagging_reporting_mode();
partition_alloc::TagViolationReportingMode::kUndefined;
#if BUILDFLAG(USE_PARTITION_ALLOC_AS_MALLOC)
reporting_mode = allocator_shim::internal::PartitionAllocMalloc::Allocator()
->memory_tagging_reporting_mode();
#endif // BUILDFLAG(USE_PARTITION_ALLOC_AS_MALLOC)
switch (bootloader_override) {
case BootloaderOverride::kDefault:
trials.emplace("MemoryTaggingBootloaderOverride", "Default");
@@ -669,7 +671,7 @@ void CheckDanglingRawPtrBufferEmpty() {
std::vector<std::array<const void*, 32>> stack_traces =
internal::InstanceTracer::GetStackTracesForDanglingRefs(entry->id);
for (const auto& raw_stack_trace : stack_traces) {
LOG(ERROR) << "Live reference from:\n";
LOG(ERROR) << "Dangling reference from:\n";
LOG(ERROR) << debug::StackTrace(raw_stack_trace.data(),
raw_stack_trace.size() -
static_cast<size_t>(ranges::count(
@@ -1129,9 +1131,6 @@ void PartitionAllocSupport::ReconfigureAfterFeatureListInit(
const size_t scheduler_loop_quarantine_capacity_in_bytes =
static_cast<size_t>(
base::features::kPartitionAllocSchedulerLoopQuarantineCapacity.Get());
const size_t scheduler_loop_quarantine_capacity_count = static_cast<size_t>(
base::features::kPartitionAllocSchedulerLoopQuarantineCapacityCount
.Get());
const bool zapping_by_free_flags = base::FeatureList::IsEnabled(
base::features::kPartitionAllocZappingByFreeFlags);
@@ -1210,7 +1209,6 @@ void PartitionAllocSupport::ReconfigureAfterFeatureListInit(
memory_tagging_reporting_mode, bucket_distribution,
allocator_shim::SchedulerLoopQuarantine(scheduler_loop_quarantine),
scheduler_loop_quarantine_capacity_in_bytes,
scheduler_loop_quarantine_capacity_count,
allocator_shim::ZappingByFreeFlags(zapping_by_free_flags));
const uint32_t extras_size = allocator_shim::GetMainPartitionRootExtrasSize();
naiveproxy/src/base/allocator/partition_allocator/partition_alloc.gni
+22
View File
@@ -234,6 +234,16 @@ declare_args() {
enable_shadow_metadata = false
}
declare_args() {
# Use full MTE protection available by changing the feature flag default
# values. So sync mode on all processes. Also disables permissive MTE.
#
# This is meant to be used primarily on bots. It is much easier to override
# the feature flags using a binary flag instead of updating multiple bots's
# scripts to pass command line arguments.
use_full_mte = false
}
# *Scan is currently only used by Chromium, and supports only 64-bit.
use_starscan = build_with_chromium && has_64_bit_pointers
@@ -258,11 +268,13 @@ if (!use_partition_alloc) {
use_hookable_raw_ptr = false
enable_backup_ref_ptr_slow_checks = false
enable_dangling_raw_ptr_checks = false
enable_dangling_raw_ptr_feature_flag = false
enable_dangling_raw_ptr_perf_experiment = false
enable_pointer_subtraction_check = false
backup_ref_ptr_poison_oob_ptr = false
enable_backup_ref_ptr_instance_tracer = false
use_starscan = false
use_full_mte = false
}
# enable_backup_ref_ptr_slow_checks can only be used if
@@ -276,6 +288,11 @@ assert(
enable_backup_ref_ptr_support || !enable_dangling_raw_ptr_checks,
"Can't enable dangling raw_ptr checks if BackupRefPtr isn't enabled at all")
# It's meaningless to force on DPD (e.g. on bots) if the support isn't compiled
# in.
assert(enable_dangling_raw_ptr_checks || !enable_dangling_raw_ptr_feature_flag,
"Meaningless to enable DPD without it compiled.")
# To run the dangling raw_ptr detector experiment, the underlying feature must
# be enabled too.
assert(
@@ -336,6 +353,11 @@ assert(build_with_chromium || !use_asan_backup_ref_ptr,
assert(!use_asan_backup_ref_ptr || use_hookable_raw_ptr,
"AsanBackupRefPtr requires RawPtrHookableImpl")
# use_full_mte can only be used if has_memory_tagging is true.
assert(
has_memory_tagging || !use_full_mte,
"Can't use full MTE protection if memory tagging isn't supported at all.")
declare_args() {
# pkeys support is explicitly disabled in all Cronet builds, as some test
# dependencies that use partition_allocator are compiled in AOSP against a
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/BUILD.gn
+8 -2
View File
@@ -200,6 +200,8 @@ buildflag_header("partition_alloc_buildflags") {
"FORCE_ENABLE_RAW_PTR_EXCLUSION=$force_enable_raw_ptr_exclusion",
"USE_FULL_MTE=use_full_mte",
"RECORD_ALLOC_INFO=$_record_alloc_info",
"USE_FREESLOT_BITMAP=$use_freeslot_bitmap",
"GLUE_CORE_POOLS=$_glue_core_pools",
@@ -337,7 +339,7 @@ if (is_clang_or_gcc) {
# This is already set when we compile libc++, see
# buildtools/third_party/libc++/BUILD.gn. But it needs to be set here as
# well, since the shim defines the symbols, to prevent them being exported.
cflags = [ "-fvisibility-global-new-delete-hidden" ]
cflags = [ "-fvisibility-global-new-delete=force-hidden" ]
}
}
@@ -799,13 +801,17 @@ if (is_clang_or_gcc) {
shim_headers = []
shim_sources = []
shim_sources += [ "shim/allocator_shim.cc" ]
shim_sources += [
"shim/allocator_shim.cc",
"shim/allocator_shim_dispatch_to_noop_on_free.cc",
]
shim_headers += [
"shim/allocator_shim.h",
"shim/allocator_shim_internals.h",
"shim/shim_alloc_functions.h",
"shim/allocator_shim_functions.h",
"shim/allocator_dispatch.h",
"shim/allocator_shim_dispatch_to_noop_on_free.h",
]
if (use_partition_alloc) {
shim_sources += [
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/internal_allocator_forward.h
+17 -4
View File
@@ -27,11 +27,24 @@ PartitionRoot& InternalAllocatorRoot();
template <typename T>
class InternalAllocator {
public:
// Member types required by allocator completeness requirements.
using value_type = T;
using size_type = std::size_t;
using difference_type = std::ptrdiff_t;
using propagate_on_container_move_assignment = std::true_type;
using is_always_equal = std::true_type;
InternalAllocator() = default;
template <typename U>
InternalAllocator(const InternalAllocator<U>&) {} // NOLINT
template <typename U>
InternalAllocator& operator=(const InternalAllocator<U>&) {
return *this;
}
template <typename U>
bool operator==(const InternalAllocator<U>&) {
// InternalAllocator<T> can free allocations made by InternalAllocator<U>.
return true;
}
value_type* allocate(std::size_t count);
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/lightweight_quarantine.cc
+32 -47
View File
@@ -11,43 +11,26 @@
namespace partition_alloc::internal {
LightweightQuarantineBranch LightweightQuarantineRoot::CreateBranch(
size_t quarantine_capacity_count,
bool lock_required) {
return LightweightQuarantineBranch(*this, quarantine_capacity_count,
lock_required);
return LightweightQuarantineBranch(*this, lock_required);
}
LightweightQuarantineBranch::LightweightQuarantineBranch(
Root& root,
size_t quarantine_capacity_count,
bool lock_required)
: root_(root),
quarantine_capacity_count_(quarantine_capacity_count),
lock_required_(lock_required),
slots_(static_cast<QuarantineSlot*>(
InternalAllocatorRoot().Alloc<AllocFlags::kNoHooks>(
sizeof(QuarantineSlot) * quarantine_capacity_count))) {
// `QuarantineCapacityCount` must be a positive number.
PA_CHECK(0 < quarantine_capacity_count);
}
LightweightQuarantineBranch::LightweightQuarantineBranch(Root& root,
bool lock_required)
: root_(root), lock_required_(lock_required) {}
LightweightQuarantineBranch::LightweightQuarantineBranch(
LightweightQuarantineBranch&& b)
: root_(b.root_),
quarantine_capacity_count_(b.quarantine_capacity_count_),
lock_required_(b.lock_required_),
slots_(b.slots_),
branch_count_(b.branch_count_),
slots_(std::move(b.slots_)),
branch_size_in_bytes_(b.branch_size_in_bytes_) {
b.slots_ = nullptr;
b.branch_count_ = 0;
b.branch_size_in_bytes_ = 0;
}
LightweightQuarantineBranch::~LightweightQuarantineBranch() {
Purge();
InternalAllocatorRoot().Free<FreeFlags::kNoHooks>(slots_);
slots_ = nullptr;
slots_.clear();
}
bool LightweightQuarantineBranch::Quarantine(void* object,
@@ -73,24 +56,18 @@ bool LightweightQuarantineBranch::Quarantine(void* object,
}
// Dequarantine some entries as required.
PurgeInternal(quarantine_capacity_count_ - 1,
capacity_in_bytes - usable_size);
PurgeInternal(capacity_in_bytes - usable_size);
// Update stats (locked).
branch_count_++;
PA_DCHECK(branch_count_ <= quarantine_capacity_count_);
branch_size_in_bytes_ += usable_size;
PA_DCHECK(branch_size_in_bytes_ <= capacity_in_bytes);
slots_[branch_count_ - 1] = {
.object = object,
.usable_size = usable_size,
};
slots_.emplace_back(slot_start, usable_size);
// Swap randomly so that the quarantine list remain shuffled.
// This is not uniformly random, but sufficiently random.
const size_t random_index = random_.RandUint32() % branch_count_;
std::swap(slots_[random_index], slots_[branch_count_ - 1]);
const size_t random_index = random_.RandUint32() % slots_.size();
std::swap(slots_[random_index], slots_.back());
}
// Update stats (not locked).
@@ -102,34 +79,42 @@ bool LightweightQuarantineBranch::Quarantine(void* object,
return true;
}
void LightweightQuarantineBranch::PurgeInternal(size_t target_branch_count,
size_t target_size_in_bytes) {
bool LightweightQuarantineBranch::IsQuarantinedForTesting(void* object) {
ConditionalScopedGuard guard(lock_required_, lock_);
uintptr_t slot_start = root_.allocator_root_.ObjectToSlotStart(object);
for (const auto& slot : slots_) {
if (slot.slot_start == slot_start) {
return true;
}
}
return false;
}
void LightweightQuarantineBranch::PurgeInternal(size_t target_size_in_bytes) {
size_t size_in_bytes = root_.size_in_bytes_.load(std::memory_order_acquire);
int64_t freed_count = 0;
int64_t freed_size_in_bytes = 0;
// Dequarantine some entries as required.
while (branch_count_ && (target_branch_count < branch_count_ ||
target_size_in_bytes < size_in_bytes)) {
while (!slots_.empty() && target_size_in_bytes < size_in_bytes) {
// As quarantined entries are shuffled, picking last entry is equivalent
// to picking random entry.
const auto& to_free = slots_[branch_count_ - 1];
const auto& to_free = slots_.back();
size_t to_free_size = to_free.usable_size;
auto* slot_span = SlotSpanMetadata::FromObject(to_free.object);
uintptr_t slot_start =
root_.allocator_root_.ObjectToSlotStart(to_free.object);
PA_DCHECK(slot_span == SlotSpanMetadata::FromSlotStart(slot_start));
auto* slot_span = SlotSpanMetadata::FromSlotStart(to_free.slot_start);
void* object = root_.allocator_root_.SlotStartToObject(to_free.slot_start);
PA_DCHECK(slot_span == SlotSpanMetadata::FromObject(object));
PA_DCHECK(to_free.object);
root_.allocator_root_.FreeNoHooksImmediate(to_free.object, slot_span,
slot_start);
PA_DCHECK(to_free.slot_start);
root_.allocator_root_.FreeNoHooksImmediate(object, slot_span,
to_free.slot_start);
freed_count++;
freed_size_in_bytes += to_free_size;
branch_count_--;
size_in_bytes -= to_free_size;
slots_.pop_back();
}
branch_size_in_bytes_ -= freed_size_in_bytes;
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/lightweight_quarantine.h
+12 -27
View File
@@ -39,7 +39,9 @@
#include <limits>
#include <memory>
#include <type_traits>
#include <vector>
#include "partition_alloc/internal_allocator_forward.h"
#include "partition_alloc/partition_alloc_base/component_export.h"
#include "partition_alloc/partition_alloc_base/rand_util.h"
#include "partition_alloc/partition_alloc_base/thread_annotations.h"
@@ -63,8 +65,7 @@ class PA_COMPONENT_EXPORT(PARTITION_ALLOC) LightweightQuarantineRoot {
: allocator_root_(allocator_root),
capacity_in_bytes_(capacity_in_bytes) {}
LightweightQuarantineBranch CreateBranch(size_t quarantine_capacity_count,
bool lock_required = true);
LightweightQuarantineBranch CreateBranch(bool lock_required = true);
void AccumulateStats(LightweightQuarantineStats& stats) const {
stats.count += count_.load(std::memory_order_relaxed);
@@ -122,38 +123,26 @@ class PA_COMPONENT_EXPORT(PARTITION_ALLOC) LightweightQuarantineBranch {
// It is possible that another branch with entries and it remains untouched.
void Purge() {
ConditionalScopedGuard guard(lock_required_, lock_);
PurgeInternal(0, 0);
PurgeInternal(0);
}
// Determines this list contains an object.
bool IsQuarantinedForTesting(void* object) {
ConditionalScopedGuard guard(lock_required_, lock_);
for (size_t i = 0; i < branch_count_; i++) {
if (slots_[i].object == object) {
return true;
}
}
return false;
}
bool IsQuarantinedForTesting(void* object);
Root& GetRoot() { return root_; }
private:
LightweightQuarantineBranch(Root& root,
size_t quarantine_capacity_count,
bool lock_required);
LightweightQuarantineBranch(Root& root, bool lock_required);
// Try to dequarantine entries to satisfy below:
// branch_count_ <= target_branch_count
// && root_.size_in_bytes_ <= target_size_in_bytes
// root_.size_in_bytes_ <= target_size_in_bytes
// It is possible that this branch cannot satisfy the
// request as it has control over only what it has. If you need to ensure the
// constraint, call `Purge()` for each branch in sequence, synchronously.
void PurgeInternal(size_t target_branch_count, size_t target_size_in_bytes)
void PurgeInternal(size_t target_size_in_bytes)
PA_EXCLUSIVE_LOCKS_REQUIRED(lock_);
Root& root_;
const size_t quarantine_capacity_count_;
bool lock_required_;
Lock lock_;
@@ -183,17 +172,13 @@ class PA_COMPONENT_EXPORT(PARTITION_ALLOC) LightweightQuarantineBranch {
// Thread-unsafe so guarded by `lock_`.
base::InsecureRandomGenerator random_ PA_GUARDED_BY(lock_);
// `slots_` hold an array of quarantined entries.
// The contents of empty slots are undefined and reads should not occur.
// First `branch_count_` slots are used and entries should be shuffled.
// `slots_` hold quarantined entries.
struct QuarantineSlot {
void* object;
uintptr_t slot_start;
size_t usable_size;
};
QuarantineSlot* slots_ PA_GUARDED_BY(lock_);
// # of quarantined entries in this branch.
size_t branch_count_ PA_GUARDED_BY(lock_) = 0;
std::vector<QuarantineSlot, InternalAllocator<QuarantineSlot>> slots_
PA_GUARDED_BY(lock_);
size_t branch_size_in_bytes_ PA_GUARDED_BY(lock_) = 0;
friend class LightweightQuarantineRoot;
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/page_allocator_internals_posix.cc
+2 -2
View File
@@ -1,13 +1,13 @@
// Copyright 2021 The Chromium Authors
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include <sys/mman.h>
#include "build/build_config.h"
#include "partition_alloc/page_allocator.h"
#include "partition_alloc/partition_alloc_base/cpu.h"
#include "partition_alloc/partition_alloc_base/notreached.h"
#include <sys/mman.h>
// PA_PROT_BTI requests a page that supports BTI landing pads.
#define PA_PROT_BTI 0x10
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/partition_alloc_base/ios/ios_util.h
-16
View File
@@ -11,22 +11,6 @@
namespace partition_alloc::internal::base::ios {
// Returns whether the operating system is iOS 12 or later.
// TODO(crbug.com/1129482): Remove once minimum supported version is at least 12
PA_COMPONENT_EXPORT(PARTITION_ALLOC_BASE) bool IsRunningOnIOS12OrLater();
// Returns whether the operating system is iOS 13 or later.
// TODO(crbug.com/1129483): Remove once minimum supported version is at least 13
PA_COMPONENT_EXPORT(PARTITION_ALLOC_BASE) bool IsRunningOnIOS13OrLater();
// Returns whether the operating system is iOS 14 or later.
// TODO(crbug.com/1129484): Remove once minimum supported version is at least 14
PA_COMPONENT_EXPORT(PARTITION_ALLOC_BASE) bool IsRunningOnIOS14OrLater();
// Returns whether the operating system is iOS 15 or later.
// TODO(crbug.com/1227419): Remove once minimum supported version is at least 15
PA_COMPONENT_EXPORT(PARTITION_ALLOC_BASE) bool IsRunningOnIOS15OrLater();
// Returns whether the operating system is at the given version or later.
PA_COMPONENT_EXPORT(PARTITION_ALLOC_BASE)
bool IsRunningOnOrLater(int32_t major, int32_t minor, int32_t bug_fix);
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/partition_alloc_base/ios/ios_util.mm
-20
View File
@@ -10,26 +10,6 @@
namespace partition_alloc::internal::base::ios {
bool IsRunningOnIOS12OrLater() {
static const bool is_running_on_or_later = IsRunningOnOrLater(12, 0, 0);
return is_running_on_or_later;
}
bool IsRunningOnIOS13OrLater() {
static const bool is_running_on_or_later = IsRunningOnOrLater(13, 0, 0);
return is_running_on_or_later;
}
bool IsRunningOnIOS14OrLater() {
static const bool is_running_on_or_later = IsRunningOnOrLater(14, 0, 0);
return is_running_on_or_later;
}
bool IsRunningOnIOS15OrLater() {
static const bool is_running_on_or_later = IsRunningOnOrLater(15, 0, 0);
return is_running_on_or_later;
}
bool IsRunningOnOrLater(int32_t major, int32_t minor, int32_t bug_fix) {
static const class OSVersion {
public:
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/partition_alloc_base/memory/ref_counted.cc
+1
View File
@@ -8,6 +8,7 @@
#include <ostream>
#include <type_traits>
#include "build/build_config.h"
#include "partition_alloc/partition_alloc_base/debug/debugging_buildflags.h"
namespace partition_alloc::internal::base::subtle {
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/partition_ref_count.h
+8 -3
View File
@@ -461,10 +461,15 @@ PA_ALWAYS_INLINE PartitionRefCount* PartitionRefCountPointer(
#if BUILDFLAG(PA_DCHECK_IS_ON) || BUILDFLAG(ENABLE_BACKUP_REF_PTR_SLOW_CHECKS)
PA_CHECK(refcount_address % alignof(PartitionRefCount) == 0);
#endif
// No need to tag because the ref-count is not protected by MTE.
return reinterpret_cast<PartitionRefCount*>(refcount_address);
// In theory, no need to MTE-tag in the "previous slot" mode, because
// ref-count isn't protected by MTE. But it doesn't hurt to do so, and helps
// us avoid a branch (plus, can't easily #include partition_root.h here, due
// to cyclic dependencies).
// TODO(bartekn): Plumb the tag from the callers, so that it can be included
// in the calculations, and not re-read from memory.
return static_cast<PartitionRefCount*>(TagAddr(refcount_address));
} else {
// No need to tag, as the metadata region isn't protected by MTE.
// No need to MTE-tag, as the metadata region isn't protected by MTE.
PartitionRefCount* table_base = reinterpret_cast<PartitionRefCount*>(
(slot_start & kSuperPageBaseMask) + SystemPageSize() * 2);
size_t index = ((slot_start & kSuperPageOffsetMask) >> SystemPageShift())
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/partition_root.cc
+7 -9
View File
@@ -993,13 +993,10 @@ void PartitionRoot::Init(PartitionOptions opts) {
if (settings.scheduler_loop_quarantine) {
scheduler_loop_quarantine_capacity_in_bytes =
opts.scheduler_loop_quarantine_capacity_in_bytes;
scheduler_loop_quarantine_capacity_count =
opts.scheduler_loop_quarantine_capacity_count;
scheduler_loop_quarantine_root.SetCapacityInBytes(
opts.scheduler_loop_quarantine_capacity_in_bytes);
scheduler_loop_quarantine.emplace(
scheduler_loop_quarantine_root.CreateBranch(
opts.scheduler_loop_quarantine_capacity_count));
scheduler_loop_quarantine_root.CreateBranch());
} else {
// Deleting a running quarantine is not supported.
PA_CHECK(!scheduler_loop_quarantine.has_value());
@@ -1044,9 +1041,11 @@ void PartitionRoot::Init(PartitionOptions opts) {
size_t ref_count_size = internal::kPartitionRefCountSizeAdjustment;
ref_count_size = internal::AlignUpRefCountSizeForMac(ref_count_size);
#if PA_CONFIG(MAYBE_INCREASE_REF_COUNT_SIZE_FOR_MTE)
// Note the brp_enabled() check above.
// TODO(bartekn): Don't increase ref-count size in the "same slot" mode.
if (IsMemoryTaggingEnabled()) {
// When MTE is enabled together with BRP (crbug.com/1445816) in the
// "previous slot" mode (note the brp_enabled() check above), there is a
// race that can be avoided by making ref-count a multiple of the MTE
// granule and not tagging it.
if (IsMemoryTaggingEnabled() && !ref_count_in_same_slot_) {
ref_count_size = internal::base::bits::AlignUp(
ref_count_size, internal::kMemTagGranuleSize);
}
@@ -1674,8 +1673,7 @@ ThreadCache* PartitionRoot::MaybeInitThreadCache() {
internal::LightweightQuarantineBranch
PartitionRoot::CreateSchedulerLoopQuarantineBranch(bool lock_required) {
return scheduler_loop_quarantine_root.CreateBranch(
scheduler_loop_quarantine_capacity_count, lock_required);
return scheduler_loop_quarantine_root.CreateBranch(lock_required);
}
// static
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/partition_root.h
+30 -13
View File
@@ -173,7 +173,6 @@ struct PartitionOptions {
AllowToggle use_configurable_pool = kDisallowed;
EnableToggle scheduler_loop_quarantine = kDisabled;
size_t scheduler_loop_quarantine_capacity_count = 0;
size_t scheduler_loop_quarantine_capacity_in_bytes = 0;
EnableToggle zapping_by_free_flags = kDisabled;
@@ -375,7 +374,6 @@ struct PA_ALIGNAS(64) PA_COMPONENT_EXPORT(PARTITION_ALLOC) PartitionRoot {
bool quarantine_always_for_testing = false;
size_t scheduler_loop_quarantine_capacity_count = 0;
size_t scheduler_loop_quarantine_capacity_in_bytes = 0;
internal::LightweightQuarantineRoot scheduler_loop_quarantine_root;
// NoDestructor because we don't need to dequarantine objects as the root
@@ -900,25 +898,45 @@ struct PA_ALIGNAS(64) PA_COMPONENT_EXPORT(PARTITION_ALLOC) PartitionRoot {
#if BUILDFLAG(PA_DCHECK_IS_ON)
if (brp_enabled()) {
PA_DCHECK(settings.ref_count_size > 0);
PA_DCHECK((settings.ref_count_size % internal::kMemTagGranuleSize) == 0);
if (!ref_count_in_same_slot_) {
PA_DCHECK((settings.ref_count_size % internal::kMemTagGranuleSize) ==
0);
}
} else {
PA_DCHECK(settings.ref_count_size == 0);
}
#endif // BUILDFLAG(PA_DCHECK_IS_ON)
// TODO(bartekn): Don't subtract ref-count size in the "same slot" mode.
return slot_size - settings.ref_count_size;
// Subtract ref-count size in the "previous slot" mode to avoid the MTE/BRP
// race (crbug.com/1445816).
return slot_size - (ref_count_in_same_slot_ ? 0 : settings.ref_count_size);
#else // PA_CONFIG(MAYBE_INCREASE_REF_COUNT_SIZE_FOR_MTE)
return slot_size;
#endif
}
#endif // BUILDFLAG(HAS_MEMORY_TAGGING)
PA_ALWAYS_INLINE size_t ref_count_size() {
#if BUILDFLAG(ENABLE_BACKUP_REF_PTR_SUPPORT)
return settings.ref_count_size;
#else
return 0;
#endif
}
static void SetBrpRefCountInSameSlot(bool ref_count_in_same_slot) {
#if BUILDFLAG(ENABLE_BACKUP_REF_PTR_SUPPORT)
ref_count_in_same_slot_ = ref_count_in_same_slot;
#endif
}
static bool GetBrpRefCountInSameSlot() {
#if BUILDFLAG(ENABLE_BACKUP_REF_PTR_SUPPORT)
return ref_count_in_same_slot_;
#else
return false;
#endif
}
private:
static inline StraightenLargerSlotSpanFreeListsMode
straighten_larger_slot_span_free_lists_ =
@@ -1236,7 +1254,7 @@ PA_ALWAYS_INLINE void PartitionAllocFreeForRefCounting(uintptr_t slot_start) {
// TODO(crbug.com/1511221): Memset entire slot in the "same slot" mode.
// Ref-count isn't used once the slot is freed.
DebugMemset(SlotStartAddr2Ptr(slot_start), kFreedByte,
slot_span->GetUtilizedSlotSize() - kInSlotRefCountBufferSize);
slot_span->GetUtilizedSlotSize() - root->ref_count_size());
#endif // BUILDFLAG(PA_EXPENSIVE_DCHECKS_ARE_ON)
root->total_size_of_brp_quarantined_bytes.fetch_sub(
@@ -1520,8 +1538,8 @@ PA_ALWAYS_INLINE void PartitionRoot::FreeInline(void* object) {
if (settings.scheduler_loop_quarantine) {
GetSchedulerLoopQuarantineBranch().Quarantine(object, slot_span,
slot_start);
return;
}
return;
}
#if BUILDFLAG(USE_STARSCAN)
@@ -1628,9 +1646,9 @@ PA_ALWAYS_INLINE void PartitionRoot::FreeNoHooksImmediate(
#if BUILDFLAG(PA_EXPENSIVE_DCHECKS_ARE_ON)
// TODO(crbug.com/1511221): Memset entire slot in the "same slot" mode.
// Ref-count isn't used once the slot is freed.
internal::DebugMemset(
internal::SlotStartAddr2Ptr(slot_start), internal::kFreedByte,
slot_span->GetUtilizedSlotSize() - internal::kInSlotRefCountBufferSize);
internal::DebugMemset(internal::SlotStartAddr2Ptr(slot_start),
internal::kFreedByte,
slot_span->GetUtilizedSlotSize() - ref_count_size());
#elif PA_CONFIG(ZERO_RANDOMLY_ON_FREE)
// `memset` only once in a while: we're trading off safety for time
// efficiency.
@@ -1638,9 +1656,8 @@ PA_ALWAYS_INLINE void PartitionRoot::FreeNoHooksImmediate(
!IsDirectMappedBucket(slot_span->bucket)) {
// TODO(crbug.com/1511221): Memset entire slot in the "same slot" mode.
// Ref-count isn't used once the slot is freed.
internal::SecureMemset(
internal::SlotStartAddr2Ptr(slot_start), 0,
slot_span->GetUtilizedSlotSize() - internal::kInSlotRefCountBufferSize);
internal::SecureMemset(internal::SlotStartAddr2Ptr(slot_start), 0,
slot_span->GetUtilizedSlotSize() - ref_count_size());
}
#endif // PA_CONFIG(ZERO_RANDOMLY_ON_FREE)
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/pointers/instance_tracer.cc
+8 -4
View File
@@ -24,12 +24,14 @@ static_assert(BUILDFLAG(ENABLE_BACKUP_REF_PTR_SUPPORT),
namespace {
struct Info {
explicit Info(uintptr_t slot_count) : slot_count(slot_count) {
explicit Info(uintptr_t slot_count, bool may_dangle)
: slot_count(slot_count), may_dangle(may_dangle) {
partition_alloc::internal::base::debug::CollectStackTrace(
stack_trace.data(), stack_trace.size());
}
uintptr_t slot_count;
bool may_dangle;
std::array<const void*, 32> stack_trace = {};
};
@@ -49,7 +51,9 @@ auto& GetStorageMutex() {
std::atomic<uint64_t> InstanceTracer::counter_ = 0;
void InstanceTracer::TraceImpl(uint64_t owner_id, uintptr_t address) {
void InstanceTracer::TraceImpl(uint64_t owner_id,
bool may_dangle,
uintptr_t address) {
PA_CHECK(owner_id);
const std::pair<uintptr_t, size_t> slot_and_size =
partition_alloc::PartitionAllocGetSlotStartAndSizeInBRPPool(address);
@@ -58,7 +62,7 @@ void InstanceTracer::TraceImpl(uint64_t owner_id, uintptr_t address) {
slot_and_size.first, slot_and_size.second));
const std::lock_guard guard(GetStorageMutex());
GetStorage().insert({owner_id, Info(slot_count)});
GetStorage().insert({owner_id, Info(slot_count, may_dangle)});
}
void InstanceTracer::UntraceImpl(uint64_t owner_id) {
@@ -72,7 +76,7 @@ InstanceTracer::GetStackTracesForDanglingRefs(uintptr_t allocation) {
std::vector<std::array<const void*, 32>> result;
const std::lock_guard guard(GetStorageMutex());
for (const auto& [id, info] : GetStorage()) {
if (info.slot_count == allocation) {
if (info.slot_count == allocation && !info.may_dangle) {
result.push_back(info.stack_trace);
}
}
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/pointers/instance_tracer.h
+8 -5
View File
@@ -26,8 +26,9 @@ class InstanceTracer {
public:
constexpr uint64_t owner_id() const { return 0; }
constexpr static void Trace(uint64_t owner_id, uintptr_t address) {}
constexpr static void Untrace(uint64_t owner_id) {}
constexpr static void Trace([[maybe_unused]] uint64_t owner_id,
[[maybe_unused]] uintptr_t address) {}
constexpr static void Untrace([[maybe_unused]] uint64_t owner_id) {}
};
#else
@@ -48,12 +49,14 @@ class PA_TRIVIAL_ABI InstanceTracer {
constexpr uint64_t owner_id() const { return owner_id_; }
constexpr static void Trace(uint64_t owner_id, uintptr_t address) {
constexpr static void Trace(uint64_t owner_id,
bool may_dangle,
uintptr_t address) {
if (partition_alloc::internal::base::is_constant_evaluated() ||
owner_id == 0) {
return;
}
TraceImpl(owner_id, address);
TraceImpl(owner_id, may_dangle, address);
}
constexpr static void Untrace(uint64_t owner_id) {
if (partition_alloc::internal::base::is_constant_evaluated() ||
@@ -73,7 +76,7 @@ class PA_TRIVIAL_ABI InstanceTracer {
private:
PA_COMPONENT_EXPORT(RAW_PTR)
static void TraceImpl(uint64_t owner_id, uintptr_t address);
static void TraceImpl(uint64_t owner_id, bool may_dangle, uintptr_t address);
PA_COMPONENT_EXPORT(RAW_PTR) static void UntraceImpl(uint64_t owner_id);
constexpr uint64_t CreateOwnerId() {
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/pointers/raw_ptr.h
+34 -11
View File
@@ -248,7 +248,7 @@ template <RawPtrTraits Traits>
using UnderlyingImplForTraits = internal::RawPtrNoOpImpl;
#endif
constexpr bool IsPtrArithmeticAllowed(RawPtrTraits Traits) {
constexpr bool IsPtrArithmeticAllowed([[maybe_unused]] RawPtrTraits Traits) {
#if BUILDFLAG(ENABLE_POINTER_ARITHMETIC_TRAIT_CHECK)
return partition_alloc::internal::ContainsFlags(
Traits, RawPtrTraits::kAllowPtrArithmetic);
@@ -1047,12 +1047,13 @@ using base::raw_ptr;
//
// When using it, please provide a justification about what guarantees that it
// will never be dereferenced after becoming dangling.
constexpr auto DisableDanglingPtrDetection = base::RawPtrTraits::kMayDangle;
constexpr inline auto DisableDanglingPtrDetection =
base::RawPtrTraits::kMayDangle;
// See `docs/dangling_ptr.md`
// Annotates known dangling raw_ptr. Those haven't been triaged yet. All the
// occurrences are meant to be removed. See https://crbug.com/1291138.
constexpr auto DanglingUntriaged = base::RawPtrTraits::kMayDangle;
constexpr inline auto DanglingUntriaged = base::RawPtrTraits::kMayDangle;
// Unlike DanglingUntriaged, this annotates raw_ptrs that are known to
// dangle only occasionally on the CQ.
@@ -1061,18 +1062,20 @@ constexpr auto DanglingUntriaged = base::RawPtrTraits::kMayDangle;
// https://docs.google.com/spreadsheets/d/1k12PQOG4y1-UEV9xDfP1F8FSk4cVFywafEYHmzFubJ8/
//
// This is not meant to be added manually. You can ignore this flag.
constexpr auto FlakyDanglingUntriaged = base::RawPtrTraits::kMayDangle;
constexpr inline auto FlakyDanglingUntriaged = base::RawPtrTraits::kMayDangle;
// Dangling raw_ptr that is more likely to cause UAF: its memory was freed in
// one task, and the raw_ptr was released in a different one.
//
// This is not meant to be added manually. You can ignore this flag.
constexpr auto AcrossTasksDanglingUntriaged = base::RawPtrTraits::kMayDangle;
constexpr inline auto AcrossTasksDanglingUntriaged =
base::RawPtrTraits::kMayDangle;
// The use of pointer arithmetic with raw_ptr is strongly discouraged and
// disabled by default. Usually a container like span<> should be used
// instead of the raw_ptr.
constexpr auto AllowPtrArithmetic = base::RawPtrTraits::kAllowPtrArithmetic;
constexpr inline auto AllowPtrArithmetic =
base::RawPtrTraits::kAllowPtrArithmetic;
// The use of uninitialized pointers is strongly discouraged. raw_ptrs will
// be initialized to nullptr by default in all cases when building against
@@ -1084,7 +1087,8 @@ constexpr auto AllowPtrArithmetic = base::RawPtrTraits::kAllowPtrArithmetic;
// Note that opting out may not always be effective, given that algorithms
// like BackupRefPtr require nullptr initializaion for correctness and thus
// silently enforce it.
constexpr auto AllowUninitialized = base::RawPtrTraits::kAllowUninitialized;
constexpr inline auto AllowUninitialized =
base::RawPtrTraits::kAllowUninitialized;
// This flag is used to tag a subset of dangling pointers. Similarly to
// DanglingUntriaged, those pointers are known to be dangling. However, we also
@@ -1093,23 +1097,33 @@ constexpr auto AllowUninitialized = base::RawPtrTraits::kAllowUninitialized;
// pressure on the BRP quarantine.
//
// This is not meant to be added manually. You can ignore this flag.
constexpr auto LeakedDanglingUntriaged = base::RawPtrTraits::kMayDangle;
constexpr inline auto LeakedDanglingUntriaged = base::RawPtrTraits::kMayDangle;
// Temporary annotation for new pointers added during the renderer rewrite.
// TODO(crbug.com/1444624): Find pre-existing dangling pointers and remove
// this annotation.
//
// DO NOT ADD new occurrences of this.
constexpr auto ExperimentalRenderer = base::RawPtrTraits::kMayDangle;
constexpr inline auto ExperimentalRenderer = base::RawPtrTraits::kMayDangle;
// Temporary introduced alias in the context of rewriting std::vector<T*> into
// std::vector<raw_ptr<T>> and in order to temporarily bypass the dangling ptr
// checks on the CQ. This alias will be removed gradually after the cl lands and
// will be replaced by DanglingUntriaged where necessary.
// Update: The alias now temporarily disables BRP. This is due to performance
// issues. BRP will be re-enabled once the issues are identified and handled.
constexpr inline auto VectorExperimental = base::RawPtrTraits::kMayDangle;
// Temporary alias introduced in the context of rewriting std::set<T*> into
// std::set<raw_ptr<T>> and in order to temporarily bypass the dangling ptr
// checks on the CQ. This alias will be removed gradually after the rewrite cl
// lands and will be replaced by DanglingUntriaged where necessary.
constexpr inline auto SetExperimental = base::RawPtrTraits::kMayDangle;
// Temporary alias introduced in the context of rewriting more containers and in
// order to temporarily bypass the dangling ptr checks on the CQ. This alias
// will be removed gradually after the rewrite cl lands and will be replaced by
// DanglingUntriaged where necessary.
constexpr inline auto CtnExperimental = base::RawPtrTraits::kMayDangle;
// Temporary workaround needed when using vector<raw_ptr<T, VectorExperimental>
// in Mocked method signatures as the macros don't allow commas within.
template <typename T, base::RawPtrTraits Traits = base::RawPtrTraits::kEmpty>
@@ -1150,6 +1164,15 @@ struct less<raw_ptr<T, Traits>> {
}
};
template <typename T, base::RawPtrTraits Traits>
struct hash<raw_ptr<T, Traits>> {
typedef raw_ptr<T, Traits> argument_type;
typedef std::size_t result_type;
result_type operator()(argument_type const& ptr) const {
return hash<T*>()(ptr.get());
}
};
// Define for cases where raw_ptr<T> holds a pointer to an array of type T.
// This is consistent with definition of std::iterator_traits<T*>.
// Algorithms like std::binary_search need that.
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/pointers/raw_ptr_backup_ref_impl.h
+2 -2
View File
@@ -219,7 +219,7 @@ struct RawPtrBackupRefImpl {
uintptr_t address = partition_alloc::UntagPtr(wrapped_ptr);
if (IsSupportedAndNotNull(address)) {
PA_BASE_CHECK(wrapped_ptr != nullptr);
PA_BASE_CHECK(IsPointeeAlive(address));
PA_BASE_CHECK(IsPointeeAlive(address)); // Detects use-after-free.
}
#endif // BUILDFLAG(PA_DCHECK_IS_ON) ||
// BUILDFLAG(ENABLE_BACKUP_REF_PTR_SLOW_CHECKS)
@@ -436,7 +436,7 @@ struct RawPtrBackupRefImpl {
return;
}
InstanceTracer::Trace(owner_id, address);
InstanceTracer::Trace(owner_id, AllowDangling, address);
}
static constexpr void Untrace(uint64_t owner_id) {
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/pointers/raw_ptr_noop_impl.h
+3 -2
View File
@@ -109,8 +109,9 @@ struct RawPtrNoOpImpl {
}
template <typename T>
static constexpr void Trace(uint64_t owner_id, T* wrapped_ptr) {}
static constexpr void Untrace(uint64_t owner_id) {}
static constexpr void Trace([[maybe_unused]] uint64_t owner_id,
[[maybe_unused]] T* wrapped_ptr) {}
static constexpr void Untrace([[maybe_unused]] uint64_t owner_id) {}
// This is for accounting only, used by unit tests.
PA_ALWAYS_INLINE static constexpr void IncrementSwapCountForTest() {}
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/shim/allocator_shim.h
-1
View File
@@ -123,7 +123,6 @@ void ConfigurePartitions(
BucketDistribution distribution,
SchedulerLoopQuarantine scheduler_loop_quarantine,
size_t scheduler_loop_quarantine_capacity_in_bytes,
size_t scheduler_loop_quarantine_capacity_count,
ZappingByFreeFlags zapping_by_free_flags);
PA_COMPONENT_EXPORT(ALLOCATOR_SHIM) uint32_t GetMainPartitionRootExtrasSize();
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/shim/allocator_shim_default_dispatch_to_partition_alloc.cc
-3
View File
@@ -493,7 +493,6 @@ void ConfigurePartitions(
BucketDistribution distribution,
SchedulerLoopQuarantine scheduler_loop_quarantine,
size_t scheduler_loop_quarantine_capacity_in_bytes,
size_t scheduler_loop_quarantine_capacity_count,
ZappingByFreeFlags zapping_by_free_flags) {
// Calling Get() is actually important, even if the return value isn't
// used, because it has a side effect of initializing the variable, if it
@@ -528,8 +527,6 @@ void ConfigurePartitions(
: partition_alloc::PartitionOptions::kDisabled;
opts.scheduler_loop_quarantine_capacity_in_bytes =
scheduler_loop_quarantine_capacity_in_bytes;
opts.scheduler_loop_quarantine_capacity_count =
scheduler_loop_quarantine_capacity_count;
opts.memory_tagging = {
.enabled = enable_memory_tagging
? partition_alloc::PartitionOptions::kEnabled
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/shim/allocator_shim_default_dispatch_to_partition_alloc.h
+1 -3
View File
@@ -95,14 +95,12 @@ PA_ALWAYS_INLINE void ConfigurePartitionsForTesting() {
auto distribution = BucketDistribution::kNeutral;
auto scheduler_loop_quarantine = SchedulerLoopQuarantine(false);
size_t scheduler_loop_quarantine_capacity_in_bytes = 0;
size_t scheduler_loop_quarantine_capacity_count = 0;
auto zapping_by_free_flags = ZappingByFreeFlags(false);
ConfigurePartitions(
enable_brp, enable_memory_tagging, memory_tagging_reporting_mode,
distribution, scheduler_loop_quarantine,
scheduler_loop_quarantine_capacity_in_bytes,
scheduler_loop_quarantine_capacity_count, zapping_by_free_flags);
scheduler_loop_quarantine_capacity_in_bytes, zapping_by_free_flags);
}
#endif // BUILDFLAG(USE_PARTITION_ALLOC_AS_MALLOC)
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/shim/allocator_shim_dispatch_to_noop_on_free.cc
+138
View File
@@ -0,0 +1,138 @@
// Copyright 2024 The Chromium Authors
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "partition_alloc/shim/allocator_shim_dispatch_to_noop_on_free.h"
#include <cstddef>
#include "partition_alloc/partition_alloc_check.h"
#include "partition_alloc/shim/allocator_dispatch.h"
#include "partition_alloc/shim/allocator_shim.h"
namespace allocator_shim {
namespace {
void* AllocFn(const AllocatorDispatch* self, size_t size, void* context) {
return self->next->alloc_function(self->next, size, context);
}
void* AllocUncheckedFn(const AllocatorDispatch* self,
size_t size,
void* context) {
return self->next->alloc_unchecked_function(self->next, size, context);
}
void* AllocZeroInitializedFn(const AllocatorDispatch* self,
size_t n,
size_t size,
void* context) {
return self->next->alloc_zero_initialized_function(self->next, n, size,
context);
}
void* AllocAlignedFn(const AllocatorDispatch* self,
size_t alignment,
size_t size,
void* context) {
return self->next->alloc_aligned_function(self->next, alignment, size,
context);
}
void* ReallocFn(const AllocatorDispatch* self,
void* address,
size_t size,
void* context) {
return self->next->realloc_function(self->next, address, size, context);
}
void FreeFn(const AllocatorDispatch* self, void* address, void* context) {}
size_t GetSizeEstimateFn(const AllocatorDispatch* self,
void* address,
void* context) {
return self->next->get_size_estimate_function(self->next, address, context);
}
size_t GoodSizeFn(const AllocatorDispatch* self, size_t size, void* context) {
return self->next->good_size_function(self->next, size, context);
}
bool ClaimedAddressFn(const AllocatorDispatch* self,
void* address,
void* context) {
return self->next->claimed_address_function(self->next, address, context);
}
unsigned BatchMallocFn(const AllocatorDispatch* self,
size_t size,
void** results,
unsigned num_requested,
void* context) {
return self->next->batch_malloc_function(self->next, size, results,
num_requested, context);
}
void BatchFreeFn(const AllocatorDispatch* self,
void** to_be_freed,
unsigned num_to_be_freed,
void* context) {}
void FreeDefiniteSizeFn(const AllocatorDispatch* self,
void* address,
size_t size,
void* context) {}
void TryFreeDefaultFn(const AllocatorDispatch* self,
void* address,
void* context) {}
static void* AlignedMallocFn(const AllocatorDispatch* self,
size_t size,
size_t alignment,
void* context) {
return self->next->aligned_malloc_function(self->next, size, alignment,
context);
}
static void* AlignedReallocFn(const AllocatorDispatch* self,
void* address,
size_t size,
size_t alignment,
void* context) {
return self->next->aligned_realloc_function(self->next, address, size,
alignment, context);
}
static void AlignedFreeFn(const AllocatorDispatch* self,
void* address,
void* context) {}
AllocatorDispatch allocator_dispatch = {
&AllocFn,
&AllocUncheckedFn,
&AllocZeroInitializedFn,
&AllocAlignedFn,
&ReallocFn,
&FreeFn,
&GetSizeEstimateFn,
&GoodSizeFn,
&ClaimedAddressFn,
&BatchMallocFn,
&BatchFreeFn,
&FreeDefiniteSizeFn,
&TryFreeDefaultFn,
&AlignedMallocFn,
&AlignedReallocFn,
&AlignedFreeFn,
nullptr /* next */
};
} // namespace
void InsertNoOpOnFreeAllocatorShimOnShutDown() {
static bool called = false;
PA_CHECK(!called);
called = true;
InsertAllocatorDispatch(&allocator_dispatch);
}
} // namespace allocator_shim
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/shim/allocator_shim_dispatch_to_noop_on_free.h
+18
View File
@@ -0,0 +1,18 @@
// Copyright 2024 The Chromium Authors
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef BASE_ALLOCATOR_PARTITION_ALLOCATOR_SRC_PARTITION_ALLOC_SHIM_ALLOCATOR_SHIM_DISPATCH_TO_NOOP_ON_FREE_H_
#define BASE_ALLOCATOR_PARTITION_ALLOCATOR_SRC_PARTITION_ALLOC_SHIM_ALLOCATOR_SHIM_DISPATCH_TO_NOOP_ON_FREE_H_
#include "partition_alloc/partition_alloc_base/component_export.h"
namespace allocator_shim {
// Places an allocator shim layer at the front of the chain during shutdown.
// This new layer replaces free() with a no-op implementation
// in order to prevent shutdown hangs.
PA_COMPONENT_EXPORT(ALLOCATOR_SHIM)
void InsertNoOpOnFreeAllocatorShimOnShutDown();
} // namespace allocator_shim
#endif // BASE_ALLOCATOR_PARTITION_ALLOCATOR_SRC_PARTITION_ALLOC_SHIM_ALLOCATOR_SHIM_DISPATCH_TO_NOOP_ON_FREE_H_
naiveproxy/src/base/allocator/partition_allocator/src/partition_alloc/thread_cache.h
+1 -1
View File
@@ -614,7 +614,7 @@ PA_ALWAYS_INLINE void ThreadCache::PutInBucket(Bucket& bucket,
// When BRP is on in the "previous slot" mode, this slot may have a BRP
// ref-count of the next, potentially allocated slot. Make sure we don't
// overwrite it.
// TODO(bartekn): Ok to overwriter in the "same slot" mode.
// TODO(bartekn): Ok to overwrite in the "same slot" mode.
int slot_size_remaining_in_16_bytes =
(bucket.slot_size - internal::kInSlotRefCountBufferSize) / 16;
naiveproxy/src/base/android/base_jni_onload.cc
-2
View File
@@ -14,8 +14,6 @@ namespace android {
bool OnJNIOnLoadInit() {
InitAtExitManager();
JNIEnv* env = base::android::AttachCurrentThread();
base::android::InitGlobalClassLoader(env);
return true;
}
naiveproxy/src/base/android/callback_android.cc
+16
View File
@@ -4,11 +4,13 @@
#include "base/android/callback_android.h"
#include "base/android/jni_android.h"
#include "base/android/jni_array.h"
#include "base/android/jni_string.h"
#include "base/android/scoped_java_ref.h"
#include "base/base_jni/Callback_jni.h"
#include "base/time/time.h"
#include "base/types/optional_ref.h"
namespace base {
namespace android {
@@ -43,6 +45,20 @@ void RunStringCallbackAndroid(const JavaRef<jobject>& callback,
Java_Helper_onObjectResultFromNative(env, callback, java_string);
}
void RunOptionalStringCallbackAndroid(
const JavaRef<jobject>& callback,
base::optional_ref<const std::string> optional_string_arg) {
JNIEnv* env = AttachCurrentThread();
if (optional_string_arg.has_value()) {
Java_Helper_onOptionalStringResultFromNative(
env, callback, true,
ConvertUTF8ToJavaString(env, optional_string_arg.value()));
} else {
Java_Helper_onOptionalStringResultFromNative(
env, callback, false, ConvertUTF8ToJavaString(env, std::string()));
}
}
void RunByteArrayCallbackAndroid(const JavaRef<jobject>& callback,
const std::vector<uint8_t>& arg) {
JNIEnv* env = AttachCurrentThread();
naiveproxy/src/base/android/callback_android.h
+5
View File
@@ -12,6 +12,7 @@
#include "base/android/scoped_java_ref.h"
#include "base/base_export.h"
#include "base/time/time.h"
#include "base/types/optional_ref.h"
// Provides helper utility methods that run the given callback with the
// specified argument.
@@ -36,6 +37,10 @@ void BASE_EXPORT RunTimeCallbackAndroid(const JavaRef<jobject>& callback,
void BASE_EXPORT RunStringCallbackAndroid(const JavaRef<jobject>& callback,
const std::string& arg);
void BASE_EXPORT RunOptionalStringCallbackAndroid(
const JavaRef<jobject>& callback,
base::optional_ref<const std::string> optional_string_arg);
void BASE_EXPORT RunByteArrayCallbackAndroid(const JavaRef<jobject>& callback,
const std::vector<uint8_t>& arg);
naiveproxy/src/base/android/early_trace_event_binding.cc
+2 -2
View File
@@ -120,13 +120,13 @@ static void JNI_EarlyTraceEvent_RecordEarlyAsyncEndEvent(JNIEnv* env,
}
bool GetBackgroundStartupTracingFlag() {
JNIEnv* env = base::android::AttachCurrentThread();
JNIEnv* env = jni_zero::AttachCurrentThread();
return base::android::Java_EarlyTraceEvent_getBackgroundStartupTracingFlag(
env);
}
void SetBackgroundStartupTracingFlag(bool enabled) {
JNIEnv* env = base::android::AttachCurrentThread();
JNIEnv* env = jni_zero::AttachCurrentThread();
base::android::Java_EarlyTraceEvent_setBackgroundStartupTracingFlag(env,
enabled);
}

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